Study of CMOS process variation by multiplexing analog characteristics

Aggressive technology scaling raises the need for efficient methods to characterize and model circuit variation at both the front and back end of line, where critical parameters such as threshold voltage and parasitic capacitance must be carefully modeled for accurate circuit performance. This thesis addresses this need by contributing a test circuit methodology for the extraction of spatial, layout and size dependent variations at both device and interconnect levels. The test chip uses a scan chain approach combined with low-leakage and low-variation switches, and Kelvin sensing connections, providing access to detailed analog device characteristics in large arrays of test devices. Front end of line (FEOL) test structures include transistors of different sizes, number of polysilicon fingers, polysilicon fingers proximity, and orientation, for both NMOS and PMOS MOSFETs. Back end of line (BEOL) test structures include parasitic coupling, plane to plane and crossover capacitances, measured using a charge-based capacitive measurement (CBCM) methodology integrated with switches in the scan chain. The testing of the designed test chip has proven successful for both device and interconnect test structures.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2007

Author dc:creator

• Gettings, Karen Mercedes González-Valentín

Advisor dc:contributor.advisor

• Duane S. Boning.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/40499

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/40499