Massachusetts Institute of Technology
Through-substrate interconnects for 3-D integration and RF systems
Abstract
dc:description.abstractInterconnects on silicon chips are fabricated on the top surface with an ever-increasing number of metal layers necessary to just meet performance needs. While devices have scaled according to Moore's law, interconnects have lagged. As metal line widths shrink and line lengths increase, parasitic resistance, capacitance, and inductance degrade circuit performance by increasing delays, loading, and power consumption. Separately, silicon has been supplanting GaAs in low-end, consumer RF applications. Improving the high-frequency performance of silicon by reducing ground inductance will project silicon technology into high-end RF and mm-wave applications. Furthermore, silicon-based systems allow for integration with digital blocks for system-on-chip (SoC). However, this introduces digital noise into the substrate, which interferes with the operation of RF/analog circuits. To address these challenges, we have developed a low-impedance, high-aspect ratio, through-substrate interconnect technology in silicon. Through-substrate vias exploit the third dimension by connecting the front to the backside of a chip so that power, ground, and global signals can be routed on the backside. Substrate vias can also be used to connect chip stacks in system-in-package designs.
Degree
thesis:*- Department dc:contributor.department
- Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
- Grantor dc:publisher
- Massachusetts Institute of Technology
- Year dc:date.issued
- 2007
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Wu, Joyce H. (Joyce Hsia-Sing), 1974-
- Advisor dc:contributor.advisor
-
- Jesús A. del Alamo.
Subjects
dc:subject × 1Rights
dc:rights- Statement dc:rights
-
- M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
- Licence dc:rights.uri
- Language dc:language.iso
- eng
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- http://hdl.handle.net/1721.1/38922
- OAI identifier oai:identifier
- oai:dspace.mit.edu:1721.1/38922