The integration of InP /InGaAsP ridge waveguide structures with dielectric waveguides on silicon

Chip-to-chip optical interconnect technology, which is being explored as a potential replacement for copper chip-to-chip interconnects at data transmission rates exceeding 10 Gb/s, is one of several technologies that could be enabled by the monolithic integration of III-V optoelectronic devices on a silicon integrated circuit. Two significant capabilities required to achieve this monolithic integration were addressed: the assembly of III-V device structures on silicon and the fabrication of the waveguides that perform the intra-chip routing of the optical signal to and from these integrated device structures. These waveguides, consisting of a silicon oxynitride core (n = 1.6) and a silicon dioxide cladding (n = 1.45) were deposited via plasma-enhanced chemical vapor deposition (PECVD). The integrated InP/InGaAsP structures were fabricated using an existing novel technique for preparing very thin (on the order of 5 pm thick) substrate free rectangular structures (approximately 145 pm wide by 300 pm long) with cleaved facets. Using a pick-and-place method, the InP/InGaAsP structures were assembled in 6 pm deep rectangular wells formed by etching through the waveguide stack. The resulting configuration of the integrated devices in the wells facilitated end-fire coupling with the silicon oxynitride waveguides.

Department dc:contributor.department

Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.

Grantor dc:publisher

Massachusetts Institute of Technology

Year dc:date.issued

2007

Author dc:creator

• Barkley, Edward R. (Edward Robert)

Advisor dc:contributor.advisor

• Clifton G. Fonstad.

• Electrical Engineering and Computer Science.

Statement dc:rights

• M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.

Licence dc:rights.uri

• http://dspace.mit.edu/handle/1721.1/7582

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/1721.1/38682

OAI identifier oai:identifier

oai:dspace.mit.edu:1721.1/38682