{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/37943"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/37943","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"An energy efficient sub-threshold baseband processor architecture for pulsed ultra-wideband communications","abstract":"Ultra-wideband (UWB) communications is currently being explored as a medium for high-data-rate last-meter wireless links. Accordingly, there has been much interest in integrating UWB radios onto battery-operated devices, creating a strong demand for energy efficient UWB systems. The objective of this work is to describe how operating the digital baseband processor in the sub-threshold region and increasing the degree of parallelism can translate into energy savings across the entire UWB receiver. While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented.","abstract_html":"Ultra-wideband (UWB) communications is currently being explored as a medium for high-data-rate last-meter wireless links. Accordingly, there has been much interest in integrating UWB radios onto battery-operated devices, creating a strong demand for energy efficient UWB systems. The objective of this work is to describe how operating the digital baseband processor in the sub-threshold region and increasing the degree of parallelism can translate into energy savings across the entire UWB receiver. While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented.","abstract_has_math":false,"creators":["Sze, Vivienne"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.","school":null,"contributors":[],"advisors":["Anantha P. Chandrakasan."],"committee_chairs":[],"committee_members":[],"year":2006,"date_issued":"2006","date_published":"2006","updated_at":"2026-07-22T22:21:18Z","subjects":["Electrical Engineering and Computer Science."],"languages":["eng"],"rights":["M.I.T. theses are protected by copyright. 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While sub-threshold operation is traditionally used for low energy, low performance applications such as wrist-watches, this work examines how sub-threshold operation can be applied to low energy, high performance applications. Simulation results for a 100-Mbps UWB baseband processor using the digital logic cell library of a 90-nm process are presented."],"dc:description.degree":["S.M."],"dc:identifier.uri":["http://hdl.handle.net/1721.1/37943"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. 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