Massachusetts Institute of Technology
Process and design techniques for low loss integrated silicon photonics
Abstract
dc:description.abstractMicroprocessors have truly revolutionized the efficiency of the world due to the high-volume and low-cost of complimentary metal oxide semiconductor (CMOS) process technology. However, the traditional scaling methods by which chips improve are soon to end. The continued drive towards smaller circuit elements and dense chip architecture has yielded to power consumption, heat production, and electromagnetic interference (RC-delay) limitations. A logical solution to surmounting this electronic interconnect bottleneck is to utilize photonic interconnects. Photonic interconnects (waveguides) offer high data bandwidths with low signal attenuation and virtually zero heat dissipation. Strategic replacement of RC speed-limited electronic interconnects with photonic interconnects is a logical step to improving data processing performance in future microprocessors. Integration of photonic circuits onto electronic chips also enables sought after networking technologies that have higher complexity and unique functionality. Similar to the integrated microchip, the employment of CMOS technology in the fabrication of integrated photonic chips enables high yield, low cost, and increased performance. Essentially, the development of an integrated CMOS compatible photonic circuit technology is an enabler of improved communication.
Degree
thesis:*- Department dc:contributor.department
- Massachusetts Institute of Technology. Dept. of Materials Science and Engineering.
- Grantor dc:publisher
- Massachusetts Institute of Technology
- Year dc:date.issued
- 2006
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Sparacin, Daniel Knight
- Advisor dc:contributor.advisor
-
- Lionel C. Kimerling.
Subjects
dc:subject × 1Rights
dc:rights- Statement dc:rights
-
- M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
- Licence dc:rights.uri
- Language dc:language.iso
- eng
Identifiers
dc:identifier.*- Handle dc:identifier.uri
- http://hdl.handle.net/1721.1/37690
- OAI identifier oai:identifier
- oai:dspace.mit.edu:1721.1/37690