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Massachusetts Institute of Technology

Design and simulation for the fabrication of integrated semiconductor optical logic gates

Abstract

dc:description.abstract

Development of ultrafast all-optical logic requires accurate and efficient modeling of optical components and interfaces. In this research, we present an all-optical logic unit cell with complete Boolean functionality as a representative circuit for modeling and optimization of monolithically integrated components. Proposed optical logic unit cell is based on an integrated balanced Mach-Zehnder interferometer (MZI) with semiconductor optical amplifiers (SOAs) in each arm and includes straight ridge waveguides, ridge waveguide bends, and multimode interference (MMI) devices. We use beam propagation method (BPM) to model, design and optimize dilute ridge waveguides, MMIs, and asymmetric twin waveguide (ATG) adiabatic taper couplers. We assess device robustness with respect to variations in fabrication, including lateral pattern transfer and etching. Bending losses in curved waveguides are evaluated using complex-frequency leaky mode computations with perfectly matched layer (PML) boundary conditions. Finite difference time domain (FDTD) method with PML is utilized in calculating reflections produced by abrupt interfaces, including a tip of an adiabatic taper coupler.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2006

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Markina-Khusid, Aleksandra
Advisor dc:contributor.advisor
  • Leslie Kolodziejski.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/37607
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/37607

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Markina-Khusid, Aleksandra. Design and simulation for the fabrication of integrated semiconductor optical logic gates. Massachusetts Institute of Technology, 2006. http://hdl.handle.net/1721.1/37607