{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/34372"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/34372","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Reptile : a distributed ILP compiler","abstract":"The past few years witnessed a dramatic shift in computer microprocessor design. Rather than continue with the traditional pursuit of increased sequential program performance, industry and academia alike chose to focus on distributed, multi-core designs. If multi-core designs are to maintain the decades-long trend of increased single threaded performance, compiler technology capable of converting a single threaded program into multiple programs must be developed. In this thesis I present the Raw Explicitly Parallel Tile Compiler (Reptile), a compiler targeting the RAW computer architecture capable of converting a single threaded program into multiple threads communicating at the instruction operand granularity. On applications with sufficient amounts of parallelism Reptile has generated code which, on the Raw processor, achieves a speedup of as much as 2.3x (cycle to cycle) over an Athlon64.","abstract_html":"The past few years witnessed a dramatic shift in computer microprocessor design. Rather than continue with the traditional pursuit of increased sequential program performance, industry and academia alike chose to focus on distributed, multi-core designs. If multi-core designs are to maintain the decades-long trend of increased single threaded performance, compiler technology capable of converting a single threaded program into multiple programs must be developed. In this thesis I present the Raw Explicitly Parallel Tile Compiler (Reptile), a compiler targeting the RAW computer architecture capable of converting a single threaded program into multiple threads communicating at the instruction operand granularity. On applications with sufficient amounts of parallelism Reptile has generated code which, on the Raw processor, achieves a speedup of as much as 2.3x (cycle to cycle) over an Athlon64.","abstract_has_math":false,"creators":["Bratt, Ian (Ian R.)"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. 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