{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/33371"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/33371","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"A Raw processor interface to an 802.11b/g RF front end","abstract":"The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw processor, this interface replaces a custom digital chip in the access point. The interface can be used with the Raw microprocessor to perform communications research, and as a system demonstrating Raw's capabilities. The interface has been built, tested, and functionally qualified.","abstract_html":"The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw processor, this interface replaces a custom digital chip in the access point. The interface can be used with the Raw microprocessor to perform communications research, and as a system demonstrating Raw's capabilities. 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