{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/33360"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/33360","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Clock division as a power saving strategy in a system constrained by high transmission frequency and low data rate","abstract":"Systems are often restricted to have higher transmission frequency than required by their data rates. Possible constraints include channel attenuation, power requirements, and backward compatibility. As a result these systems have unused band- width, leading to inefficient use of power. In this thesis, I propose to slow the internal operating frequency of a cochlear implant receiver in order to reduce the internal power consumption by more than a factor of ten. I have created a new data encoding scheme, called \"N-[pi] Shift Encoding\", which makes clock division a viable solution. This clock division technique can be applied to other similarly constrained systems.","abstract_html":"Systems are often restricted to have higher transmission frequency than required by their data rates. Possible constraints include channel attenuation, power requirements, and backward compatibility. As a result these systems have unused band- width, leading to inefficient use of power. In this thesis, I propose to slow the internal operating frequency of a cochlear implant receiver in order to reduce the internal power consumption by more than a factor of ten. I have created a new data encoding scheme, called &quot;N-[pi] Shift Encoding&quot;, which makes clock division a viable solution. This clock division technique can be applied to other similarly constrained systems.","abstract_has_math":false,"creators":["Selbst, Andrew D. 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