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Massachusetts Institute of Technology

Fundamental building blocks for a compact optoelectronic neural network processor

Abstract

dc:description.abstract

The focus of this thesis is interconnects within the Compact Optoelectronic Neural Network Processor. The goal of the Compact Optoelectronic Neural Network Processor Project (CONNPP) is to build a small, rugged neural network co-processing unit. This processor will be optimized for solving various signal processing problems such as image segmentation or facial recognition. These represent a class of problems for which the traditional logic-based architectures are not optimized. The CONNPP utilizes the processing power of traditional electronic integrated circuits along with the communications benefits of optoelectronic interconnects to provide a three-dimensionally scalable architecture. The topic of interconnects includes both optoelectronic interconnects between processing planes as well as wire based interconnects within the processing planes. The optoelectronic inter-plane interconnects allow the CONNPP to achieve 3-dimensional scalablility. These interconnects employ an array of holograms designed and fabricated using an analytic model that has been developed. This analytic model takes into account reading and writing the hologram at different wavelengths as well as non-idealities of the optoelectronic devices being used. The analytic model was tested and showed agreement with experiment to within 10% of the calculated values. The photodetectors used for the testing of this system have been designed within standard process technologies using a lateral PiN structure and a novel lateral BJT structure. In addition, highly-linear transimpedance amplifiers were designed to condition the signal from the photodetector for further processing.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Dept. of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2003

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Ruedlinger, Benjamin Franklin, 1976-
Advisor dc:contributor.advisor
  • Cardinal Warde.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/29621
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/29621

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Ruedlinger, Benjamin Franklin, 1976-. Fundamental building blocks for a compact optoelectronic neural network processor. Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/29621