{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/151316"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/151316","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution","abstract":"Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution.","abstract_html":"Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution.","abstract_has_math":false,"creators":["Attaluri, Nithya"],"institution":"Massachusetts Institute of Technology","degree_name":"Master","degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science","school":null,"contributors":[],"advisors":["Sanchez, Daniel"],"committee_chairs":[],"committee_members":[],"year":2023,"date_issued":"2023-06","date_published":"2023-06","updated_at":"2026-07-22T22:21:22Z","subjects":[],"languages":[],"rights":["In Copyright - Educational Use Permitted","Copyright retained by author(s)"],"rights_urls":["https://rightsstatements.org/page/InC-EDU/1.0/"],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/1721.1/151316","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Sanchez, Daniel"]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. 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Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.Eng."]},{"key":"dc:title","label":"Title","values":["Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution"]}]}],"canonical_facts":{"dc:contributor.advisor":["Sanchez, Daniel"],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"],"dc:creator":["Attaluri, Nithya"],"dc:date.accessioned":["2023-07-31T19:30:51Z"],"dc:date.available":["2023-07-31T19:30:51Z"],"dc:date.issued":["2023-06"],"dc:description.abstract":["Sparse matrix-sparse matrix multiplication (SpMSpM) and sparse convolution are critical primitive operations for scientific computing and deep learning. Prior work has proposed accelerators for each of these primitives, but these systems are often specialized to run either SpMSpM or sparse convolution efficiently. Although there are methods to run sparse convolution on an SpMSpM accelerator, and vice versa, this typically incurs unnecessary space overheads, higher memory traffic, or reduced performance. Ideally, a single hardware accelerator should provide native support for both operations. This work addresses this challenge through Tardigrade, a hardware accelerator for both SpMSpM and sparse convolution. Tardigrade extends the design of Gamma, a recent hardware accelerator for SpMSpM, to accelerate sparse convolution while retaining its SpMSpM capabilities. We compare Tardigrade’s performance against that of Gamma and recent accelerators for sparse convolutional neural networks (CNNs). Tardigrade shows comparable performance on SpMSpM and achieves a gmean 3.1× improvement in speed on sparse convolution."],"dc:description.degree":["M.Eng."],"dc:identifier.uri":["https://hdl.handle.net/1721.1/151316"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["In Copyright - Educational Use Permitted","Copyright retained by author(s)"],"dc:rights.uri":["https://rightsstatements.org/page/InC-EDU/1.0/"],"dc:title":["Tardigrade: A Hardware Accelerator for Sparse Matrix Multiplication and Sparse Convolution"],"dc:type":["Thesis"],"thesis:degree_name":["Master","Master of Engineering in Electrical Engineering and Computer Science"]},"updated_at":"2026-07-22T22:21:22Z"}