{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/151223"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/151223","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Manta: An In-Situ Debugging Tool for Programmable Hardware","abstract":"Designing and debugging digital hardware has traditionally used vendor-provided tools, which are large and platform-constrained. Designers expend considerable effort accommodating toolchains for Field Programmable Gate Array (FPGA) development, which include utilities for debugging logic on the FPGA itself. As an alternative, this work proposes Manta, a lightweight, modular, platform-independent, and intuitive tool for debugging digital logic on FPGAs. Manta is designed to supplement vendor tools, and includes a logic analyzer, block memory interface, and the ability to measure and control individual signals on the FPGA. These tools are shown to build faster and consume fewer on-chip resources than equivalent vendor offerings, without any restrictions on chip family or vendor. Ethernet and UART interfaces provide convenient and high bandwidth communication between the host machine and target FPGA, and an extensible Python API allows for easy development of custom applications. This complete system produces an accessible and equitable FPGA development experience for use in educational, professional, and hobbyist environments alike.","abstract_html":"Designing and debugging digital hardware has traditionally used vendor-provided tools, which are large and platform-constrained. Designers expend considerable effort accommodating toolchains for Field Programmable Gate Array (FPGA) development, which include utilities for debugging logic on the FPGA itself. As an alternative, this work proposes Manta, a lightweight, modular, platform-independent, and intuitive tool for debugging digital logic on FPGAs. Manta is designed to supplement vendor tools, and includes a logic analyzer, block memory interface, and the ability to measure and control individual signals on the FPGA. These tools are shown to build faster and consume fewer on-chip resources than equivalent vendor offerings, without any restrictions on chip family or vendor. Ethernet and UART interfaces provide convenient and high bandwidth communication between the host machine and target FPGA, and an extensible Python API allows for easy development of custom applications. This complete system produces an accessible and equitable FPGA development experience for use in educational, professional, and hobbyist environments alike.","abstract_has_math":false,"creators":["Moseley, Fischer Jay"],"institution":"Massachusetts Institute of Technology","degree_name":"Master","degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. 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