{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/140121"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/140121","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Current Shuttling Cell Voltage Balancers: Design, Evaluation, and Simulation","abstract":"Batteries are becoming increasingly important in a variety of applications, including electric vehicles and ships as well as load matching in electric grids. Cell voltage balancers are critical to extracting maximal performance out of batteries and to extending their lifespan. Charge pump balancers can quickly and efficiently shuttle charge across battery cells to equalize voltages. Component selection of MOSFETs and capacitors is vital in optimizing for performance, cost, and volume. This thesis presents experimental and PSpice simulation data from several capacitor-based charge pump configurations designed for cell voltage balancing. At 0.4 V cell differential, the peak balance current of the 2S balancer was over 9.9 A. At 0.8 V cell differential, the peak balance current of the 4S balancer was over 14.6 A. Ultimately, these charge pumps can be combined to construct a high-current and multilevel cell voltage balancer efficient across a wide range of voltages.","abstract_html":"Batteries are becoming increasingly important in a variety of applications, including electric vehicles and ships as well as load matching in electric grids. Cell voltage balancers are critical to extracting maximal performance out of batteries and to extending their lifespan. Charge pump balancers can quickly and efficiently shuttle charge across battery cells to equalize voltages. Component selection of MOSFETs and capacitors is vital in optimizing for performance, cost, and volume. This thesis presents experimental and PSpice simulation data from several capacitor-based charge pump configurations designed for cell voltage balancing. At 0.4 V cell differential, the peak balance current of the 2S balancer was over 9.9 A. At 0.8 V cell differential, the peak balance current of the 4S balancer was over 14.6 A. Ultimately, these charge pumps can be combined to construct a high-current and multilevel cell voltage balancer efficient across a wide range of voltages.","abstract_has_math":false,"creators":["Negm, Mostafa H."],"institution":"Massachusetts Institute of Technology","degree_name":"Master","degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science","school":null,"contributors":[],"advisors":["Kirtley Jr., James L.","Lynch, William A."],"committee_chairs":[],"committee_members":[],"year":2021,"date_issued":"2021-09","date_published":"2021-09","updated_at":"2026-07-22T22:22:08Z","subjects":[],"languages":[],"rights":["In Copyright - Educational Use Permitted","Copyright MIT"],"rights_urls":["http://rightsstatements.org/page/InC-EDU/1.0/"],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/1721.1/140121","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Kirtley Jr., James L.","Lynch, William A."]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"]},{"key":"dc:creator","label":"Author","values":["Negm, Mostafa H."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2022-02-07T15:25:16Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2022-02-07T15:25:16Z"]},{"key":"dc:date.issued","label":"Date","values":["2021-09"]},{"key":"dc:publisher","label":"Institution","values":["Massachusetts Institute of Technology"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master","Master of Engineering in Electrical Engineering and Computer Science"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright - Educational Use Permitted","Copyright MIT"]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://rightsstatements.org/page/InC-EDU/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://hdl.handle.net/1721.1/140121"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["Batteries are becoming increasingly important in a variety of applications, including electric vehicles and ships as well as load matching in electric grids. Cell voltage balancers are critical to extracting maximal performance out of batteries and to extending their lifespan. Charge pump balancers can quickly and efficiently shuttle charge across battery cells to equalize voltages. Component selection of MOSFETs and capacitors is vital in optimizing for performance, cost, and volume. This thesis presents experimental and PSpice simulation data from several capacitor-based charge pump configurations designed for cell voltage balancing. At 0.4 V cell differential, the peak balance current of the 2S balancer was over 9.9 A. At 0.8 V cell differential, the peak balance current of the 4S balancer was over 14.6 A. Ultimately, these charge pumps can be combined to construct a high-current and multilevel cell voltage balancer efficient across a wide range of voltages."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M.Eng."]},{"key":"dc:title","label":"Title","values":["Current Shuttling Cell Voltage Balancers: Design, Evaluation, and Simulation"]}]}],"canonical_facts":{"dc:contributor.advisor":["Kirtley Jr., James L.","Lynch, William A."],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"],"dc:creator":["Negm, Mostafa H."],"dc:date.accessioned":["2022-02-07T15:25:16Z"],"dc:date.available":["2022-02-07T15:25:16Z"],"dc:date.issued":["2021-09"],"dc:description.abstract":["Batteries are becoming increasingly important in a variety of applications, including electric vehicles and ships as well as load matching in electric grids. Cell voltage balancers are critical to extracting maximal performance out of batteries and to extending their lifespan. Charge pump balancers can quickly and efficiently shuttle charge across battery cells to equalize voltages. Component selection of MOSFETs and capacitors is vital in optimizing for performance, cost, and volume. This thesis presents experimental and PSpice simulation data from several capacitor-based charge pump configurations designed for cell voltage balancing. At 0.4 V cell differential, the peak balance current of the 2S balancer was over 9.9 A. At 0.8 V cell differential, the peak balance current of the 4S balancer was over 14.6 A. Ultimately, these charge pumps can be combined to construct a high-current and multilevel cell voltage balancer efficient across a wide range of voltages."],"dc:description.degree":["M.Eng."],"dc:identifier.uri":["https://hdl.handle.net/1721.1/140121"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["In Copyright - Educational Use Permitted","Copyright MIT"],"dc:rights.uri":["http://rightsstatements.org/page/InC-EDU/1.0/"],"dc:title":["Current Shuttling Cell Voltage Balancers: Design, Evaluation, and Simulation"],"dc:type":["Thesis"],"thesis:degree_name":["Master","Master of Engineering in Electrical Engineering and Computer Science"]},"updated_at":"2026-07-22T22:22:08Z"}