{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/140004"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/140004","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"High performance MoS₂ transistors based on wafer-scale low-temperature MOCVD synthesis","abstract":"Among all the possible back-end-of-line (BEOL) solutions to improve the integration density and functionality of conventional silicon circuits, two-dimensional (2D) material devices are believed to be very promising, due to their high mobility, relatively large band gaps, atom-level thickness, performance comparable to the one of silicon devices, and great potential in realizing 3D integration. However, wafer-scale growth of high-quality, continuous 2D materials thin film with BEOL compatible temperature (<400°C) and good uniformity has always been difficult to realize. To achieve low contact resistance to these materials is also very challenging and hinders the development of 2D material devices and circuits. In this thesis, we will demonstrate a novel 8-inch, BEOL-compatible metal organic chemical vapor deposition (MOCVD) method for the synthesis of 2D transition metal dichalcogenide materials with growth temperature lower than 400°C. Highly-scaled high-performance MoS₂ transistors will also be investigated with different contact engineering methods. These findings represent crucial steps for high performance power electronic circuits as well as realizing ultra-large scale BEOL integration with silicon circuits.","abstract_html":"Among all the possible back-end-of-line (BEOL) solutions to improve the integration density and functionality of conventional silicon circuits, two-dimensional (2D) material devices are believed to be very promising, due to their high mobility, relatively large band gaps, atom-level thickness, performance comparable to the one of silicon devices, and great potential in realizing 3D integration. However, wafer-scale growth of high-quality, continuous 2D materials thin film with BEOL compatible temperature (&lt;400°C) and good uniformity has always been difficult to realize. To achieve low contact resistance to these materials is also very challenging and hinders the development of 2D material devices and circuits. In this thesis, we will demonstrate a novel 8-inch, BEOL-compatible metal organic chemical vapor deposition (MOCVD) method for the synthesis of 2D transition metal dichalcogenide materials with growth temperature lower than 400°C. Highly-scaled high-performance MoS₂ transistors will also be investigated with different contact engineering methods. These findings represent crucial steps for high performance power electronic circuits as well as realizing ultra-large scale BEOL integration with silicon circuits.","abstract_has_math":false,"creators":["Zhu, Jiadi"],"institution":"Massachusetts Institute of Technology","degree_name":"Master","degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. 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However, wafer-scale growth of high-quality, continuous 2D materials thin film with BEOL compatible temperature (<400°C) and good uniformity has always been difficult to realize. To achieve low contact resistance to these materials is also very challenging and hinders the development of 2D material devices and circuits. In this thesis, we will demonstrate a novel 8-inch, BEOL-compatible metal organic chemical vapor deposition (MOCVD) method for the synthesis of 2D transition metal dichalcogenide materials with growth temperature lower than 400°C. Highly-scaled high-performance MoS₂ transistors will also be investigated with different contact engineering methods. These findings represent crucial steps for high performance power electronic circuits as well as realizing ultra-large scale BEOL integration with silicon circuits."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["S.M."]},{"key":"dc:title","label":"Title","values":["High performance MoS₂ transistors based on wafer-scale low-temperature MOCVD synthesis"]}]}],"canonical_facts":{"dc:contributor.advisor":["Palacios, Tomás"],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"],"dc:creator":["Zhu, Jiadi"],"dc:date.accessioned":["2022-02-07T15:18:26Z"],"dc:date.available":["2022-02-07T15:18:26Z"],"dc:date.issued":["2021-09"],"dc:description.abstract":["Among all the possible back-end-of-line (BEOL) solutions to improve the integration density and functionality of conventional silicon circuits, two-dimensional (2D) material devices are believed to be very promising, due to their high mobility, relatively large band gaps, atom-level thickness, performance comparable to the one of silicon devices, and great potential in realizing 3D integration. However, wafer-scale growth of high-quality, continuous 2D materials thin film with BEOL compatible temperature (<400°C) and good uniformity has always been difficult to realize. To achieve low contact resistance to these materials is also very challenging and hinders the development of 2D material devices and circuits. In this thesis, we will demonstrate a novel 8-inch, BEOL-compatible metal organic chemical vapor deposition (MOCVD) method for the synthesis of 2D transition metal dichalcogenide materials with growth temperature lower than 400°C. Highly-scaled high-performance MoS₂ transistors will also be investigated with different contact engineering methods. These findings represent crucial steps for high performance power electronic circuits as well as realizing ultra-large scale BEOL integration with silicon circuits."],"dc:description.degree":["S.M."],"dc:identifier.uri":["https://hdl.handle.net/1721.1/140004"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["In Copyright - Educational Use Permitted","Copyright MIT"],"dc:rights.uri":["http://rightsstatements.org/page/InC-EDU/1.0/"],"dc:title":["High performance MoS₂ transistors based on wafer-scale low-temperature MOCVD synthesis"],"dc:type":["Thesis"],"thesis:degree_name":["Master","Master of Science in Electrical Engineering and Computer Science"]},"updated_at":"2026-07-22T22:22:00Z"}