{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/139078"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/139078","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"Photonic Integrated Circuit Packaging Using Silicon Based Optical Interconnects","abstract":"As electrical interconnections reach their physical limit, optoelectronic packaging solutions are a critical bottleneck in the effort to seamlessly integrate silicon photonic devices - a technology capable of handling high data rates for next generation data center telecom applications. In this thesis, novel silicon based optical couplers capable of low loss, robust connections from an optical fiber to a photonic integrated circuit (PIC) and a PIC to another PIC are presented. The first of these, the fiber-to-chip coupler, utilizes a graded index material stack in the vertical direction and a non-adiabatic taper in the horizontal direction to focus light into a single mode waveguide, all while maintaining planarity and a monolithic design. Distinguishing features from prior designs are made in the form of coupler rotation, added structural elements, and removal of all curved facets. Notable advantages include customization of the output PIC waveguide, high intrinsic coupling efficiency, wide alignment tolerances, CMOS compatibility, and scalability to mass manufacturing. Following this will be the description of the adiabatic, inverse SiₓOᵧN subscript z cross tapers which provide vertical evanescent coupling of light from one PIC to another PIC. A final beam expansion design is presented for chip-to-cip coupling, one capable of maintaining silicon input and output waveguides while increasing tolerances to within the accuracy capabilities of high speed pick and place die bonders. Simulations using 3D finite-difference time-domain (FDTD) and eigenmode expansion (EME) methods were utilized to determine quantitative performance metrics including coupling efficiency, packaging misalignment tolerance, and wavelength and polarization dependence. The comparison of these coupling designs to other state of the art fiber-to-chip and chip-to-chip coupling designs was also done to evaluate the their performance in the context of their peers.","abstract_html":"As electrical interconnections reach their physical limit, optoelectronic packaging solutions are a critical bottleneck in the effort to seamlessly integrate silicon photonic devices - a technology capable of handling high data rates for next generation data center telecom applications. In this thesis, novel silicon based optical couplers capable of low loss, robust connections from an optical fiber to a photonic integrated circuit (PIC) and a PIC to another PIC are presented. The first of these, the fiber-to-chip coupler, utilizes a graded index material stack in the vertical direction and a non-adiabatic taper in the horizontal direction to focus light into a single mode waveguide, all while maintaining planarity and a monolithic design. Distinguishing features from prior designs are made in the form of coupler rotation, added structural elements, and removal of all curved facets. Notable advantages include customization of the output PIC waveguide, high intrinsic coupling efficiency, wide alignment tolerances, CMOS compatibility, and scalability to mass manufacturing. Following this will be the description of the adiabatic, inverse SiₓOᵧN subscript z cross tapers which provide vertical evanescent coupling of light from one PIC to another PIC. A final beam expansion design is presented for chip-to-cip coupling, one capable of maintaining silicon input and output waveguides while increasing tolerances to within the accuracy capabilities of high speed pick and place die bonders. Simulations using 3D finite-difference time-domain (FDTD) and eigenmode expansion (EME) methods were utilized to determine quantitative performance metrics including coupling efficiency, packaging misalignment tolerance, and wavelength and polarization dependence. The comparison of these coupling designs to other state of the art fiber-to-chip and chip-to-chip coupling designs was also done to evaluate the their performance in the context of their peers.","abstract_has_math":false,"creators":["Weninger, Drew Michael"],"institution":"Massachusetts Institute of Technology","degree_name":"Master","degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Department of Materials Science and Engineering","school":null,"contributors":[],"advisors":["Kimerling, Lionel C.","Agarwal, Anuradha Murthy","Otalvaro, Samuel Serna","Johnson, Cort"],"committee_chairs":[],"committee_members":[],"year":2021,"date_issued":"2021-06","date_published":"2021-06","updated_at":"2026-07-22T22:22:31Z","subjects":[],"languages":[],"rights":["In Copyright - Educational Use Permitted","Copyright retained by author(s)"],"rights_urls":["https://rightsstatements.org/page/InC-EDU/1.0/"],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/1721.1/139078","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Kimerling, Lionel C.","Agarwal, Anuradha Murthy","Otalvaro, Samuel Serna","Johnson, Cort"]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Department of Materials Science and Engineering"]},{"key":"dc:creator","label":"Author","values":["Weninger, Drew Michael"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2022-01-14T14:48:38Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2022-01-14T14:48:38Z"]},{"key":"dc:date.issued","label":"Date","values":["2021-06"]},{"key":"dc:publisher","label":"Institution","values":["Massachusetts Institute of Technology"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"thesis:degree_name","label":"Degree Name","values":["Master","Master of Science in Materials Science and Engineering"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["In Copyright - Educational Use Permitted","Copyright retained by author(s)"]},{"key":"dc:rights.uri","label":"Rights URI","values":["https://rightsstatements.org/page/InC-EDU/1.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://hdl.handle.net/1721.1/139078"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["As electrical interconnections reach their physical limit, optoelectronic packaging solutions are a critical bottleneck in the effort to seamlessly integrate silicon photonic devices - a technology capable of handling high data rates for next generation data center telecom applications. In this thesis, novel silicon based optical couplers capable of low loss, robust connections from an optical fiber to a photonic integrated circuit (PIC) and a PIC to another PIC are presented. The first of these, the fiber-to-chip coupler, utilizes a graded index material stack in the vertical direction and a non-adiabatic taper in the horizontal direction to focus light into a single mode waveguide, all while maintaining planarity and a monolithic design. Distinguishing features from prior designs are made in the form of coupler rotation, added structural elements, and removal of all curved facets. Notable advantages include customization of the output PIC waveguide, high intrinsic coupling efficiency, wide alignment tolerances, CMOS compatibility, and scalability to mass manufacturing. Following this will be the description of the adiabatic, inverse SiₓOᵧN subscript z cross tapers which provide vertical evanescent coupling of light from one PIC to another PIC. A final beam expansion design is presented for chip-to-cip coupling, one capable of maintaining silicon input and output waveguides while increasing tolerances to within the accuracy capabilities of high speed pick and place die bonders. Simulations using 3D finite-difference time-domain (FDTD) and eigenmode expansion (EME) methods were utilized to determine quantitative performance metrics including coupling efficiency, packaging misalignment tolerance, and wavelength and polarization dependence. The comparison of these coupling designs to other state of the art fiber-to-chip and chip-to-chip coupling designs was also done to evaluate the their performance in the context of their peers."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["S.M."]},{"key":"dc:title","label":"Title","values":["Photonic Integrated Circuit Packaging Using Silicon Based Optical Interconnects"]}]}],"canonical_facts":{"dc:contributor.advisor":["Kimerling, Lionel C.","Agarwal, Anuradha Murthy","Otalvaro, Samuel Serna","Johnson, Cort"],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Materials Science and Engineering"],"dc:creator":["Weninger, Drew Michael"],"dc:date.accessioned":["2022-01-14T14:48:38Z"],"dc:date.available":["2022-01-14T14:48:38Z"],"dc:date.issued":["2021-06"],"dc:description.abstract":["As electrical interconnections reach their physical limit, optoelectronic packaging solutions are a critical bottleneck in the effort to seamlessly integrate silicon photonic devices - a technology capable of handling high data rates for next generation data center telecom applications. In this thesis, novel silicon based optical couplers capable of low loss, robust connections from an optical fiber to a photonic integrated circuit (PIC) and a PIC to another PIC are presented. The first of these, the fiber-to-chip coupler, utilizes a graded index material stack in the vertical direction and a non-adiabatic taper in the horizontal direction to focus light into a single mode waveguide, all while maintaining planarity and a monolithic design. Distinguishing features from prior designs are made in the form of coupler rotation, added structural elements, and removal of all curved facets. Notable advantages include customization of the output PIC waveguide, high intrinsic coupling efficiency, wide alignment tolerances, CMOS compatibility, and scalability to mass manufacturing. Following this will be the description of the adiabatic, inverse SiₓOᵧN subscript z cross tapers which provide vertical evanescent coupling of light from one PIC to another PIC. A final beam expansion design is presented for chip-to-cip coupling, one capable of maintaining silicon input and output waveguides while increasing tolerances to within the accuracy capabilities of high speed pick and place die bonders. Simulations using 3D finite-difference time-domain (FDTD) and eigenmode expansion (EME) methods were utilized to determine quantitative performance metrics including coupling efficiency, packaging misalignment tolerance, and wavelength and polarization dependence. The comparison of these coupling designs to other state of the art fiber-to-chip and chip-to-chip coupling designs was also done to evaluate the their performance in the context of their peers."],"dc:description.degree":["S.M."],"dc:identifier.uri":["https://hdl.handle.net/1721.1/139078"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["In Copyright - Educational Use Permitted","Copyright retained by author(s)"],"dc:rights.uri":["https://rightsstatements.org/page/InC-EDU/1.0/"],"dc:title":["Photonic Integrated Circuit Packaging Using Silicon Based Optical Interconnects"],"dc:type":["Thesis"],"thesis:degree_name":["Master","Master of Science in Materials Science and Engineering"]},"updated_at":"2026-07-22T22:22:31Z"}