{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/119595"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/119595","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"A modular real-time hardware-in-the-loop simulation environment for microgrids","abstract":"In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network.","abstract_html":"In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network.","abstract_has_math":false,"creators":["Overlin, Matthew Ryan"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science","school":null,"contributors":[],"advisors":["James L. Kirtley, Jr."],"committee_chairs":[],"committee_members":[],"year":2017,"date_issued":"2017","date_published":"2017","updated_at":"2026-07-22T22:22:30Z","subjects":["Electrical Engineering and Computer Science."],"languages":["eng"],"rights":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."],"rights_urls":["http://dspace.mit.edu/handle/1721.1/7582"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/1721.1/119595","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["James L. Kirtley, Jr."]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"]},{"key":"dc:contributor.other","label":"Dc Contributor Other","values":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."]},{"key":"dc:creator","label":"Author","values":["Overlin, Matthew Ryan"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2018-12-11T21:07:47Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2018-12-11T21:07:47Z"]},{"key":"dc:date.issued","label":"Date","values":["2017"]},{"key":"dc:publisher","label":"Institution","values":["Massachusetts Institute of Technology"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Electrical Engineering and Computer Science."]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://dspace.mit.edu/handle/1721.1/7582"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/1721.1/119595"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.","Cataloged from PDF version of thesis.","Includes bibliographical references (pages 149-152)."]},{"key":"dc:description.abstract","label":"Abstract","values":["In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M. Eng."]},{"key":"dc:title","label":"Title","values":["A modular real-time hardware-in-the-loop simulation environment for microgrids"]}]}],"canonical_facts":{"dc:contributor.advisor":["James L. Kirtley, Jr."],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science"],"dc:contributor.other":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."],"dc:creator":["Overlin, Matthew Ryan"],"dc:date.accessioned":["2018-12-11T21:07:47Z"],"dc:date.available":["2018-12-11T21:07:47Z"],"dc:date.issued":["2017"],"dc:description":["Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.","Cataloged from PDF version of thesis.","Includes bibliographical references (pages 149-152)."],"dc:description.abstract":["In this work, a real-time load flow solver that solves for the complex bus voltages in a 4-bus electrical network (with 1 bus as the swing/reference bus) was designed and implemented. Simple Distributed Generator (DG) models were written in C++, with a 3-phase inverter always as the last sub-system of each DG model. The inverter was implemented as a real-/reactive-power controller. Two nodes in the network were made to have adjustable real and reactive power. Real and reactive powers in the network, line impedances, and node connectivity were used to solve for bus voltages in a Gauss-Seidel Load Flow Solver (implemented in an intel MAX® 10 FPGA). The implementation was carried out assuming balanced operation at all of the nodes and a balanced network."],"dc:description.degree":["M. Eng."],"dc:identifier.uri":["http://hdl.handle.net/1721.1/119595"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."],"dc:rights.uri":["http://dspace.mit.edu/handle/1721.1/7582"],"dc:subject":["Electrical Engineering and Computer Science."],"dc:title":["A modular real-time hardware-in-the-loop simulation environment for microgrids"],"dc:type":["Thesis"]},"updated_at":"2026-07-22T22:22:30Z"}