{"id":{"repo_id":"mit","oai_identifier":"oai:dspace.mit.edu:1721.1/113122"},"canonical_url":"https://search.dev.ndltd.org/etd/mit/oai:dspace.mit.edu:1721.1/113122","repository":{"repo_id":"mit","name":"MIT","base_url":"https://dspace.mit.edu/oai/request"},"display":{"title":"A zero-voltage switching technique for high frequency buck converter ICs","abstract":"This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC.","abstract_html":"This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC.","abstract_has_math":false,"creators":["Musabeyoglu, Ahmet Can"],"institution":"Massachusetts Institute of Technology","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":"Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.","school":null,"contributors":[],"advisors":["John Tilly and David Perreault."],"committee_chairs":[],"committee_members":[],"year":2017,"date_issued":"2017","date_published":"2017","updated_at":"2026-07-22T22:21:49Z","subjects":["Electrical Engineering and Computer Science."],"languages":["eng"],"rights":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."],"rights_urls":["http://dspace.mit.edu/handle/1721.1/7582"],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/1721.1/113122","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["John Tilly and David Perreault."]},{"key":"dc:contributor.department","label":"Department","values":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."]},{"key":"dc:contributor.other","label":"Dc Contributor Other","values":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."]},{"key":"dc:creator","label":"Author","values":["Musabeyoglu, Ahmet Can"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2018-01-12T20:57:32Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2018-01-12T20:57:32Z"]},{"key":"dc:date.issued","label":"Date","values":["2017"]},{"key":"dc:publisher","label":"Institution","values":["Massachusetts Institute of Technology"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Electrical Engineering and Computer Science."]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."]},{"key":"dc:rights.uri","label":"Rights URI","values":["http://dspace.mit.edu/handle/1721.1/7582"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/1721.1/113122"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.","This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.","Cataloged from student-submitted PDF version of thesis.","Includes bibliographical references (pages 59-60)."]},{"key":"dc:description.abstract","label":"Abstract","values":["This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC."]},{"key":"dc:description.degree","label":"Dc Description Degree","values":["M. Eng."]},{"key":"dc:title","label":"Title","values":["A zero-voltage switching technique for high frequency buck converter ICs"]}]}],"canonical_facts":{"dc:contributor.advisor":["John Tilly and David Perreault."],"dc:contributor.department":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."],"dc:contributor.other":["Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science."],"dc:creator":["Musabeyoglu, Ahmet Can"],"dc:date.accessioned":["2018-01-12T20:57:32Z"],"dc:date.available":["2018-01-12T20:57:32Z"],"dc:date.issued":["2017"],"dc:description":["Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.","This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.","Cataloged from student-submitted PDF version of thesis.","Includes bibliographical references (pages 59-60)."],"dc:description.abstract":["This thesis explores a zero-voltage switching (ZVS) method that can be used to decrease the frequency dependent losses in a buck converter. The specific application for this thesis was a buck converter IC with an input voltage of up to 42V. The method utilizes the addition of an auxiliary circuit composed of a helper inductor and two helper power MOSFETs that compliment the switching transition of a conventional synchronous buck converter topology. It is shown in this thesis that by using the described topology, the switching losses of the high-side power MOSFET in a synchronous buck converter can be reduced by up to 45%. Furthermore, it is shown that a similar helper circuit could be used to reduce the gate drive losses for both power MOSFETs in a synchronous buck converter by up to 60%. Since the method requires the use of an additional helper inductor with a small value (10-50 nH), various methods to integrate this inductor into an IC package are investigated. 0.35[mu]m BiCMOS technology was used to simulate and analyze the merits of the described topology and compare it to the LT8697, a hard-switched synchronous buck converter IC."],"dc:description.degree":["M. Eng."],"dc:identifier.uri":["http://hdl.handle.net/1721.1/113122"],"dc:language.iso":["eng"],"dc:publisher":["Massachusetts Institute of Technology"],"dc:rights":["MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission."],"dc:rights.uri":["http://dspace.mit.edu/handle/1721.1/7582"],"dc:subject":["Electrical Engineering and Computer Science."],"dc:title":["A zero-voltage switching technique for high frequency buck converter ICs"],"dc:type":["Thesis"]},"updated_at":"2026-07-22T22:21:49Z"}