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Massachusetts Institute of Technology

Standard operating procedure for Highly Accelerated Life Testing (HALT) : design and standardization of fixture setup for circuit boards

Abstract

dc:description.abstract

This thesis deals with the introduction of Highly Accelerated Life Testing (HALT) in a multinational corporation as part of a reliability improvement process for printed circuit boards (PCBs). More specifically, the thesis focuses on drafting a standard operating procedure (SOP) to standardize the fixture setup process so as to minimize variation in vibrational responses attributed to fixture setup. This study proposes a three phase approach to meet the objective. The first phase aims to minimize variation in the gauges and the vibration table. A gauge repeatability and reproducibility (gauge R&R) test is conducted on two triaxial accelerometers to determine the most suitable gauge for HALT. Next, a spatial uniformity test is conducted on the vibration table using design of experiments (DOE) method to determine the region with the most consistent vibration levels for testing. The second phase aims to reduce variation in fixture usage by introducing a generic fixture design base on fixture design principles. The last phase involves proposing a short-run statistical process control (SPC) method to detect setup variability. The results from the gauge R&R test show that mechanically mounted accelerometers have the least gauge variance. Using an SOP, switching from wax-mounting to threaded stud-mounting reduces gauge variance by approximately 90%. However, wax-mounted accelerometers are still relevant for measuring vibrational responses from PCBs due to its non-invasive properties. The drawback will be that the gauge becomes a key contributor to measurement variation. The spatial uniformity test reveals that the center of the vibration table has the least variation and is selected for the fixture setup. Further limitations on the HALT chamber are highlighted. Evaluation on the proposed generic fixture demonstrates that the fixture has met the key design criteria and manage to induce consistent failures to the PCBs. Limitations on the fixture design are also considered. The proposed SPC method is able to detect at least 88% of the assignable sources of variation in a simulation test. Finally, a custom SOP for the fixture setup is drafted for the company.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Department of Mechanical Engineering.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2016

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Chew, Dexter Xuan Han
Advisor dc:contributor.advisor
  • David E. Hardt and Duane S. Boning.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • MIT theses are protected by copyright. They may be viewed, downloaded, or printed from this source but further reproduction or distribution in any format is prohibited without written permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/106765
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/106765

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Chew, Dexter Xuan Han. Standard operating procedure for Highly Accelerated Life Testing (HALT) : design and standardization of fixture setup for circuit boards. Massachusetts Institute of Technology, 2016. http://hdl.handle.net/1721.1/106765