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Massachusetts Institute of Technology

Architectural support for commutativity in hardware speculation

Abstract

dc:description.abstract

Hardware speculative execution schemes (e.g., hardware transactional memory (HTM)) enjoy low run-time overheads but suffer from limited concurrency because they detect conflicts at the level of reads and writes. By contrast, software speculation schemes can reduce conflicts by exploiting that many operations on shared data are semantically commutative: they produce semantically equivalent results when reordered. However, software techniques often incur unacceptable run-time overheads. To bridge this dichotomy, this thesis presents CommTM, an HTM that exploits semantic commutativity. CommTM extends the coherence protocol and conflict detection scheme to allow multiple cores to perform user-defined commutative operations to shared data concurrently and without conflicts. CommTM preserves transactional guarantees and can be applied to arbitrary HTMs. This thesis details CommTM's implementation and presents its evaluation. The evaluation uses a series of micro-benchmarks that covers commonly used operations and a suite of full transactional memory applications. We see that CommTM scales many operations that serialize on conventional HTMs, such as counter increments, priority updates, and top-K set insertions. As a result, at 128 cores on full applications, CommTM outperforms a conventional eager-lazy HTM by up to 3.4x and reduces or eliminates aborts.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2016

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Chiu, Virginia
Advisor dc:contributor.advisor
  • Daniel Sanchez.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/106029
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/106029

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Chiu, Virginia. Architectural support for commutativity in hardware speculation. Massachusetts Institute of Technology, 2016. http://hdl.handle.net/1721.1/106029