Back to results

Massachusetts Institute of Technology

Cache coherent commutative operations

Abstract

dc:description.abstract

This thesis presents Coup, a technique that reduces the cost of updates in shared memory systems. In particular, it describes a new cache coherence protocol, MEUSI, and evaluates its performance under simulation in zsim. MEUSI extends the MESI protocol to allow data to be cached in a new update-only state, reducing both block-level thrashing and on-chip network traffic under many parallel workflows. Coup permits both single-word and multi-word commutative data operations, which are implemented as x86-64 ISA extensions. To evaluate single-word instructions, this thesis presents a case study of a new reference counting scheme, and for multi-word commutative operations, this thesis describes the design of a commutative memory allocator. Coup and MEUSI confer significant benefits to the reference counting scheme and the memory allocator, both in terms of performance and ease of programming.

Degree

thesis:*
Department dc:contributor.department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Grantor dc:publisher
Massachusetts Institute of Technology
Year dc:date.issued
2015

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Horn, Webb H
Advisor dc:contributor.advisor
  • Daniel Sanchez.

Subjects

dc:subject × 1

Rights

dc:rights
Statement dc:rights
  • M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Language dc:language.iso
eng

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/1721.1/100601
OAI identifier oai:identifier
oai:dspace.mit.edu:1721.1/100601

Chain of custody

source
Harvested from
MIT
Base URL
dspace.mit.edu/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
citation

Horn, Webb H. Cache coherent commutative operations. Massachusetts Institute of Technology, 2015. http://hdl.handle.net/1721.1/100601