EFFICIENT APPROACHES FOR QUBIT MAPPING ON NISQ COMPUTERS

<p>—Quantum computing is gaining momentum in revolutionizing the way we approach complex problem-solving. However, the practical implementation of quantum algorithms remains a significant challenge due to the error-prone and hardware limits of near-term quantum devices. For instance, physical qubit connections are limited, which necessitates the use of quantum SWAP gates to dynamically transform the logical topology during execution. In addition, to optimize fidelity, it is essential to ensure that 1) the allocated hardware has a low error rate and 2) the number of SWAP gates injected into the circuit is minimized. To address these challenges, we propose a suite of algorithms: the Fidelity-aware Graph Extraction Algorithm (FGEA) is used to identify the hardware region with the lowest probability of error, the Frequency-based Mapping Algorithm (FMA) allocates logical-physical qubits that reduce the potential distance of topological transformation, and the Heuristic Routing Algorithm (HRA) searches for an optimal swapping injection strategy. We evaluate the proposed algorithms on the IBM-provided Noisy Intermediate-Scale Quantum (NISQ) computer, using a dataset consisting of 17 different quantum circuits of various sizes. The circuits are executed on the IBM Toronto Falcon processor. The three proposed algorithms outperform the existing SABRE algorithm in reducing the number of SWAP gates required. Therefore, our proposed algorithms hold significant promise in enhancing the fidelity and reducing the number of SWAP gates required in implementing quantum algorithms.</p>

Name thesis:degree_name

Master of Science in Computer Science (MSCS)

Level thesis:degree_level

Thesis

Discipline thesis:degree_discipline

Computer Science

Year dc:date.available

2023

Author dc:creator

• Khandavilli, Sri Sesha Sailaja Lakshmi Tulasi

Contributors dc:contributor

• Dr. Tu Nguyen
• Dr. Yong Pei
• Dr. Selena He

• Quantum computing
• Qubit mapping
• SWAP reduction
• Calibration data
• Circuit fidelity
• Gate execution time
• Other Computer Engineering

Repository record dc:identifier

https://digitalcommons.kennesaw.edu/cs_etd/55

OAI identifier oai:identifier

oai:digitalcommons.kennesaw.edu:cs_etd-1060