Polymorphic computing abstraction for heterogeneous architectures

<p>Integration of multiple computing paradigms onto system on chip (SoC) has pushed the boundaries of design space exploration for hardware architectures and computing system software stack. The heterogeneity of computing styles in SoC has created a new class of architectures referred to as Heterogeneous Architectures. Novel applications developed to exploit the different computing styles are user centric for embedded SoC. Software and hardware designers are faced with several challenges to harness the full potential of heterogeneous architectures. Applications have to execute on more than one compute style to increase overall SoC resource utilization. The implication of such an abstraction is that application threads need to be polymorphic. Operating system layer is thus faced with the problem of scheduling polymorphic threads. Resource allocation is also an important problem to be dealt by the OS. Morphism evolution of application threads is constrained by the availability of heterogeneous computing resources. Traditional design optimization goals such as computational power and lower energy per computation are inadequate to satisfy user centric application resource needs. Resource allocation decisions at application layer need to permeate to the architectural layer to avoid conflicting demands which may affect energy-delay characteristics of application threads. We propose Polymorphic computing abstraction as a unified computing model for heterogeneous architectures to address the above issues. Simulation environment for polymorphic applications is developed and evaluated under various scheduling strategies to determine the effectiveness of polymorphism abstraction on resource allocation. User satisfaction model is also developed to complement polymorphism and used for optimization of resource utilization at application and network layer of embedded systems.</p>

Name thesis:degree_name

Doctor of Philosophy

Level thesis:degree_level

dissertation

Department dc:contributor.department

Department of Electrical and Computer Engineering

Year dc:date.issued

2015

Author dc:creator

• Ponpandi, Swamy

Advisor dc:contributor.advisor

• Akhilesh Tyagi

Language dc:language.iso

en

DOI

https://doi.org/10.31274/etd-180810-4161

Identifier

archive/lib.dr.iastate.edu/etd/14608/

OAI identifier oai:identifier

oai:dr.lib.iastate.edu:20.500.12876/28793