A Method for Image Classification Using Low-Precision Analog Computing Arrays

Computing with analog micro electronics can offer several advantages over standard digital technology, most notably: Low space and power consumption and massive parallelization. On the other hand, analog computation lacks the exactness of digital calculations due to inevitable device variations introduced during the chip production, but also due to electric noise in the analog signals. Artificial neural networks are well suited for parallel analog implementations, first, because of their inherent parallelity and second, because they can adapt to device imperfections by training. This thesis evaluates the feasibility of implementing a convolutional neural network for image classification on a massively parallel low-power hardware system. A particular, mixed analogdigital, hardware model is considered, featuring simple threshold neurons. Appropriate, gradient-free, training algorithms, combining self-organization and supervised learning are developed and tested with two benchmark problems (MNIST hand-written digits and traffic signs). Software simulations evaluate the methods under various defined computation faults. A model-free closed-loop technique is shown to compensate for rather serious computation errors without the need for explicit error quantification. Last but not least, the developed networks and the training techniques are verified on a real prototype chip.

Level thesis:degree_level

thesis.doctoral

Grantor dc:publisher

Universität Heidelberg

Year

2006

Author dc:creator

• Fieres, Johannes

Contributors dc:contributor

• Meier, Karlheinz

Repository record source_url

http://www.ub.uni-heidelberg.de/archiv/7027

OAI identifier oai:identifier

oai:archiv.ub.uni-heidelberg.de:7027