Design methods for self-repairing digital logic

A systematic approach for the design of self-testable, self-correcting, self-repairing and self-healing digital systems was proposed. This self-test/self-repair methodology is accomplished autonomously, in a distributed fashion, so that it can scale as the size of the system grows. Modular redundancy and re-programmability are exploited to accomplish generic self-test (applicable to nearly any application) and to enable self-repair in general, and self-healing in FPGAs. Error rates are measured throughout the design to distinguish between transient errors and permanent or semi-permanent logic faults. Original logic design is automatically transformed to this self-healing architecture via customizable software. Logic reconfiguration occurs automatically, replacing failing logic modules so that the system continues to operate error-free while partial dynamic reconfiguration is used to heal failing logic (in the case of soft faults in FPGAs). Various digital designs of different scales are implemented and examined under random error injection. The test results demonstrate the effectiveness of this design.

Level thesis:degree_level

Doctoral

Department dc:contributor.department

Electrical and Computer Engineering

Grantor dc:publisher

Georgia Institute of Technology

Year dc:date.issued

2019

Author dc:creator

• Yang, Jingchi

Advisor dc:contributor.advisor

• Keezer, David C.

Committee members dc:contributor.committeemember

• Milor, Linda
• Madisetti, Vijay
• Jayaraman, Sundaresan
• Chatterjee, Abhijit

• Fault-tolerant
• Self-repair

Handle dc:identifier.uri

http://hdl.handle.net/1853/62326

OAI identifier oai:identifier

oai:repository.gatech.edu:1853/62326