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Technische Universiteit Eindhoven

Sequential logic extraction of CMOS transistor networks

Degree

thesis:*
Name dc:type.qualificationname
Master
Level dc:type.qualificationlevel
Studentthesis types
Year dc:date.issued
1991

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • van Rooij, F.M.T.
Advisor dc:contributor.advisor
  • Jess, Jochen

Rights

Language dc:language
eng

Identifiers

dc:identifier.*
Identifier
oai:pure.tue.nl:studenttheses/5ec1c090-e71a-4fba-805c-8330a964f5aa
OAI identifier oai:identifier
oai:pure.tue.nl:studenttheses/5ec1c090-e71a-4fba-805c-8330a964f5aa

Chain of custody

source
Harvested from
Technische Universiteit Eindhoven
Base URL
pure.tue.nl/ws/oai
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

van Rooij, F.M.T.. Sequential logic extraction of CMOS transistor networks. Studentthesis types thesis, 1991. https://research.tue.nl/nl/studentTheses/5ec1c090-e71a-4fba-805c-8330a964f5aa