{"id":{"repo_id":"edithcowan","oai_identifier":"oai:ro.ecu.edu.au:theses-1027"},"canonical_url":"https://search.dev.ndltd.org/etd/edithcowan/oai:ro.ecu.edu.au:theses-1027","repository":{"repo_id":"edithcowan","name":"Edith Cowan University","base_url":"https://ro.ecu.edu.au/do/oai/"},"display":{"title":"A jittered-sampling correction technique for ADCs","abstract":"In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough understanding of sampling in various data converters is complied.","abstract_html":"In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough understanding of sampling in various data converters is complied.","abstract_has_math":false,"creators":["Tourabaly, Jamiil A."],"institution":"Edith Cowan University, Research Online, Perth, Western Australia","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2008,"date_issued":"2008-01-01T08:00:00Z","date_published":"2008-01-01T08:00:00Z","updated_at":"2026-07-27T19:21:40Z","subjects":["Jitter","ADC","flicker noise","phase noise","Passive CMOS","Computer Engineering"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://ro.ecu.edu.au/theses/27","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Tourabaly, Jamiil A."]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2008-01-01T08:00:00Z"]},{"key":"dc:publisher","label":"Institution","values":["Edith Cowan University, Research Online, Perth, Western Australia"]},{"key":"dc:type","label":"Dc Type","values":["thesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Jitter","ADC","flicker noise","phase noise","Passive CMOS","Computer Engineering"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://ro.ecu.edu.au/theses/27","https://ro.ecu.edu.au/context/theses/article/1027/viewcontent/A_jittered_sampling_correction_technique_for_ADCs.pdf"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough understanding of sampling in various data converters is complied."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:source","label":"Dc Source","values":["Theses: Doctorates and Masters"]},{"key":"dc:title","label":"Title","values":["A jittered-sampling correction technique for ADCs"]}]}],"canonical_facts":{"dc:creator":["Tourabaly, Jamiil A."],"dc:date":["2008-01-01T08:00:00Z"],"dc:description":["In Analogue to Digital Converters (ADCs) jittered sampling raises the noise floor; this leads to a decrease in its Signal to Noise ratio (SNR) and its effective number of bits (ENOB). This research studies a technique that compensate for the effects of sampling with a jittered clock. A thorough understanding of sampling in various data converters is complied."],"dc:format":["application/pdf"],"dc:identifier":["https://ro.ecu.edu.au/theses/27","https://ro.ecu.edu.au/context/theses/article/1027/viewcontent/A_jittered_sampling_correction_technique_for_ADCs.pdf"],"dc:publisher":["Edith Cowan University, Research Online, Perth, Western Australia"],"dc:source":["Theses: Doctorates and Masters"],"dc:subject":["Jitter","ADC","flicker noise","phase noise","Passive CMOS","Computer Engineering"],"dc:title":["A jittered-sampling correction technique for ADCs"],"dc:type":["thesis"]},"updated_at":"2026-07-27T19:21:40Z"}