{"id":{"repo_id":"de-montfort","oai_identifier":"oai:dora.dmu.ac.uk:2086/25623"},"canonical_url":"https://search.dev.ndltd.org/etd/de-montfort/oai:dora.dmu.ac.uk:2086/25623","repository":{"repo_id":"de-montfort","name":"De Montfort University","base_url":"https://dora.dmu.ac.uk/server/oai/request"},"display":{"title":"Development of Next Generation of High Voltage Poly Crystalline Silicon Thin Film Transistors","abstract":"This work mainly focuses on development of next generation polysilicon high voltage TFTs for their potential use in display applications and in PICs where high voltage and low current arc a requirement. A study on high voltage SOI and SOS devices is also carried out to transfer the knowledge acquired from them to polysilicon TFTs. Extensive numerical simulations have been performed using ISE TCAD and MEDICI device simulators. The experimental characteristics and the device physics of conventional structures such as self aligned LVTFT, OD HVTFT and MFP TFT are reviewed to provide the basis for understanding novel structures, which have been presented in this work. A novel dual gate structure with variable doping slots in the offset region is experimentally demonstrated to show blocking voltage capability in excess of 300V and its operation analysed. This novel structure shows improved on state performance in comparison to dual gale offset drain devices. The spreading of electric field in the intrinsic region helps to achieve higher breakdown voltage. Three operating modes of this device are clearly elucidated. The impact of hydrogenation on the device characteristics is also investigated. Two novel dual gate devices with conductive modulation are experimentally demonstrated and analysed. They show improved on state performance in comparison to their majority carrier counter part. A novel device concept called “Radial Confinement” to improve the on/off state performance of the lateral device is proposed and demonstrated through simulation and experiments. This concept can be used for SOI, SOS and polysilicon Thin Film Transistors with appropriate modifications. The key feature is that the drift region width varies gradually from anode to cathode to achieve charge confinement in the radial direction.","abstract_html":"This work mainly focuses on development of next generation polysilicon high voltage TFTs for their potential use in display applications and in PICs where high voltage and low current arc a requirement. A study on high voltage SOI and SOS devices is also carried out to transfer the knowledge acquired from them to polysilicon TFTs. Extensive numerical simulations have been performed using ISE TCAD and MEDICI device simulators. The experimental characteristics and the device physics of conventional structures such as self aligned LVTFT, OD HVTFT and MFP TFT are reviewed to provide the basis for understanding novel structures, which have been presented in this work. A novel dual gate structure with variable doping slots in the offset region is experimentally demonstrated to show blocking voltage capability in excess of 300V and its operation analysed. This novel structure shows improved on state performance in comparison to dual gale offset drain devices. The spreading of electric field in the intrinsic region helps to achieve higher breakdown voltage. Three operating modes of this device are clearly elucidated. The impact of hydrogenation on the device characteristics is also investigated. Two novel dual gate devices with conductive modulation are experimentally demonstrated and analysed. They show improved on state performance in comparison to their majority carrier counter part. A novel device concept called “Radial Confinement” to improve the on/off state performance of the lateral device is proposed and demonstrated through simulation and experiments. This concept can be used for SOI, SOS and polysilicon Thin Film Transistors with appropriate modifications. The key feature is that the drift region width varies gradually from anode to cathode to achieve charge confinement in the radial direction.","abstract_has_math":false,"creators":["Subramanian, Krishnan"],"institution":"De Montfort University","degree_name":"PhD","degree_level":"Doctoral","degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2002,"date_issued":"2002-04","date_published":"2002-04","updated_at":"2026-07-24T06:18:40Z","subjects":[],"languages":[],"rights":[],"rights_urls":["https://dora.dmu.ac.uk/bitstreams/56935292-dbb2-4b37-8807-bf38d8f6ccf4/download"],"identifier_entries":[]},"links":{"outbound_url":null,"outbound_label":null,"outbound_source":null},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Subramanian, Krishnan"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.issued","label":"Date","values":["2002-04"]},{"key":"dc:publisher.department","label":"Dc Publisher Department","values":["Faculty of Technology, Arts and Culture"]},{"key":"dc:publisher.institution","label":"Dc Publisher Institution","values":["De Montfort University"]},{"key":"dc:relation.isreferencedby","label":"Dc Relation Isreferencedby","values":["https://hdl.handle.net/2086/25623"]},{"key":"dc:type","label":"Dc Type","values":["Thesis or dissertation"]},{"key":"dc:type.qualificationlevel","label":"Dc Type Qualificationlevel","values":["Doctoral"]},{"key":"dc:type.qualificationname","label":"Dc Type Qualificationname","values":["PhD"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:rights","label":"Dc Rights","values":["https://dora.dmu.ac.uk/bitstreams/56935292-dbb2-4b37-8807-bf38d8f6ccf4/download"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://dora.dmu.ac.uk/bitstreams/bdf74023-f916-46c3-994b-72745a0b6899/download"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["This work mainly focuses on development of next generation polysilicon high voltage TFTs for their potential use in display applications and in PICs where high voltage and low current arc a requirement. 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The impact of hydrogenation on the device characteristics is also investigated. Two novel dual gate devices with conductive modulation are experimentally demonstrated and analysed. They show improved on state performance in comparison to their majority carrier counter part. A novel device concept called “Radial Confinement” to improve the on/off state performance of the lateral device is proposed and demonstrated through simulation and experiments. This concept can be used for SOI, SOS and polysilicon Thin Film Transistors with appropriate modifications. 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