{"id":{"repo_id":"cent-lancashire","oai_identifier":"oai:clok.uclan.ac.uk:20309"},"canonical_url":"https://search.dev.ndltd.org/etd/cent-lancashire/oai:clok.uclan.ac.uk:20309","repository":{"repo_id":"cent-lancashire","name":"University of Central Lancashire","base_url":"https://clok.uclan.ac.uk/cgi/oai2"},"display":{"title":"Adaptive digital multiprocessor systems for image processing applications","abstract":"The aim of the project was to develop the digital processing capabilities of adaptive multiprocessor systems in image processing applications. Adaptive architectural configurations are the main area of investigation. Chapter 1 briefly reviews image processing and outlines various associated image processing routines. Chapter 2 describes various forms of system parallelism for image processing operations, and various interconnection networks are outlined and discussed. Chapter 3 discusses four methods of decreasing the execution time of image processing algorithms. Image partitioning and adaptivity of a proposed system is discussed. Some system architectural considerations are discussed, and a brief comparison of crossbar, multiple bus and partial bus interconnection networks is presented. The redundancy in the partial bus is discussed and a new interconnection network is proposed. Chapter 4 outlines the design, construction and testing of arbitration, processor and memory circuits for a section of the proposed multiprocessor system. Chapter 5 discusses four methods of evaluating system performance and compares the performances of the multiple bus, partial bus and modified partial bus. Conclusions for the project are given in Chapter 6 and a proposal for further work is presented.","abstract_html":"The aim of the project was to develop the digital processing capabilities of adaptive multiprocessor systems in image processing applications. Adaptive architectural configurations are the main area of investigation. Chapter 1 briefly reviews image processing and outlines various associated image processing routines. Chapter 2 describes various forms of system parallelism for image processing operations, and various interconnection networks are outlined and discussed. Chapter 3 discusses four methods of decreasing the execution time of image processing algorithms. Image partitioning and adaptivity of a proposed system is discussed. Some system architectural considerations are discussed, and a brief comparison of crossbar, multiple bus and partial bus interconnection networks is presented. The redundancy in the partial bus is discussed and a new interconnection network is proposed. Chapter 4 outlines the design, construction and testing of arbitration, processor and memory circuits for a section of the proposed multiprocessor system. Chapter 5 discusses four methods of evaluating system performance and compares the performances of the multiple bus, partial bus and modified partial bus. Conclusions for the project are given in Chapter 6 and a proposal for further work is presented.","abstract_has_math":false,"creators":["Brady, Martin"],"institution":"Lancashire Polytechnic","degree_name":"mphil","degree_level":"masters","degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":1986,"date_issued":"1986-10","date_published":"1986-10","updated_at":"2026-07-24T01:36:10Z","subjects":["H600 - Electronic & electrical engineering"],"languages":["en"],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":null,"outbound_label":null,"outbound_source":null},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["Brady, Martin"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["1986-10-01"]},{"key":"dc:date.issued","label":"Date","values":["1986-10"]},{"key":"dc:publisher.department","label":"Dc Publisher Department","values":["School of Electrical and Electronic Engineering"]},{"key":"dc:publisher.institution","label":"Dc Publisher Institution","values":["Lancashire Polytechnic"]},{"key":"dc:relation.isreferencedby","label":"Dc Relation Isreferencedby","values":["https://knowledge.lancashire.ac.uk/id/eprint/20309/"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.qualificationlevel","label":"Dc Type Qualificationlevel","values":["masters"]},{"key":"dc:type.qualificationname","label":"Dc Type Qualificationname","values":["mphil"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["H600 - Electronic & electrical engineering"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["en"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://knowledge.lancashire.ac.uk/id/eprint/20309/1/20309%20Martin%20Brady%20Oct86%20adaptive%20digital%20multiprocessor%20stysems%20for%20image%20processing%20applications%20degree%20of%20Master%20of%20Philosophyunpublished%20Oct86%20University%20of%20Central%20Lancashire%20unknown%20159.pdf"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["The aim of the project was to develop the digital processing capabilities of adaptive multiprocessor systems in image processing applications. Adaptive architectural configurations are the main area of investigation. Chapter 1 briefly reviews image processing and outlines various associated image processing routines. Chapter 2 describes various forms of system parallelism for image processing operations, and various interconnection networks are outlined and discussed. Chapter 3 discusses four methods of decreasing the execution time of image processing algorithms. Image partitioning and adaptivity of a proposed system is discussed. Some system architectural considerations are discussed, and a brief comparison of crossbar, multiple bus and partial bus interconnection networks is presented. The redundancy in the partial bus is discussed and a new interconnection network is proposed. Chapter 4 outlines the design, construction and testing of arbitration, processor and memory circuits for a section of the proposed multiprocessor system. Chapter 5 discusses four methods of evaluating system performance and compares the performances of the multiple bus, partial bus and modified partial bus. Conclusions for the project are given in Chapter 6 and a proposal for further work is presented."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf"]},{"key":"dc:title","label":"Title","values":["Adaptive digital multiprocessor systems for image processing applications"]}]}],"canonical_facts":{"dc:creator":["Brady, Martin"],"dc:date":["1986-10-01"],"dc:date.issued":["1986-10"],"dc:description.abstract":["The aim of the project was to develop the digital processing capabilities of adaptive multiprocessor systems in image processing applications. Adaptive architectural configurations are the main area of investigation. Chapter 1 briefly reviews image processing and outlines various associated image processing routines. Chapter 2 describes various forms of system parallelism for image processing operations, and various interconnection networks are outlined and discussed. Chapter 3 discusses four methods of decreasing the execution time of image processing algorithms. Image partitioning and adaptivity of a proposed system is discussed. Some system architectural considerations are discussed, and a brief comparison of crossbar, multiple bus and partial bus interconnection networks is presented. The redundancy in the partial bus is discussed and a new interconnection network is proposed. Chapter 4 outlines the design, construction and testing of arbitration, processor and memory circuits for a section of the proposed multiprocessor system. Chapter 5 discusses four methods of evaluating system performance and compares the performances of the multiple bus, partial bus and modified partial bus. Conclusions for the project are given in Chapter 6 and a proposal for further work is presented."],"dc:format":["application/pdf"],"dc:identifier.uri":["https://knowledge.lancashire.ac.uk/id/eprint/20309/1/20309%20Martin%20Brady%20Oct86%20adaptive%20digital%20multiprocessor%20stysems%20for%20image%20processing%20applications%20degree%20of%20Master%20of%20Philosophyunpublished%20Oct86%20University%20of%20Central%20Lancashire%20unknown%20159.pdf"],"dc:language":["en"],"dc:publisher.department":["School of Electrical and Electronic Engineering"],"dc:publisher.institution":["Lancashire Polytechnic"],"dc:relation.isreferencedby":["https://knowledge.lancashire.ac.uk/id/eprint/20309/"],"dc:subject":["H600 - Electronic & electrical engineering"],"dc:title":["Adaptive digital multiprocessor systems for image processing applications"],"dc:type":["Thesis"],"dc:type.qualificationlevel":["masters"],"dc:type.qualificationname":["mphil"]},"updated_at":"2026-07-24T01:36:10Z"}