{"id":{"repo_id":"cent-lancashire","oai_identifier":"oai:clok.uclan.ac.uk:1884"},"canonical_url":"https://search.dev.ndltd.org/etd/cent-lancashire/oai:clok.uclan.ac.uk:1884","repository":{"repo_id":"cent-lancashire","name":"University of Central Lancashire","base_url":"https://clok.uclan.ac.uk/cgi/oai2"},"display":{"title":"Robust hardware elements for weightless artificial neural networks","abstract":"This thesis investigates novel robust hardware elements for weightless artificial neural systems with a bias towards high integrity avionics applications. The author initially reviews the building blocks of physiological neural systems and then chronologically describes the development of weightless artificial neural systems. Several new design methodologies for the implementation of robust binary sum-and-threshold neurons are presented. The new techniques do not rely on weighted binary counters or registered arithmetic units for their operation making them less susceptible to transient single event upsets. They employ Boolean, weightless binary, asynchronous elements throughout thus increasing robustness in the presence of impulsive noise. Hierarchies formed from these neural elements are studied and a weightless probabilisitic activation function proposed for non-deterministic applications. Neuroram, an auto-associative memory created using these weightless neurons is described and analysed. The signal-to-noise ratio characteristics are compared with the traditional Hamming distance metric. This led to the proposal that neuroram can form a threshold logic based digital signal filter. Two weightless autoassociative memory based neuro-filters are presented and their filtration properties studied and compared with a traditional median filter. Eachn novel architecture was emulated using weightless numericM ATLAB code prior to schematic design and functional simulation. Several neural elements were implemented and validated using FPGA technology. A preliminary robustness evaluation was performed. The large scale particle accelerator at the Theodor Svedberg Laboratory at the University of Uppsala, Sweden, was used to generate transienut psetsin an FPGA performing a weightless binary neural function. One paper,two letters and five international patents have been published during the course of this research. The author has significantly contributed to the field of weightless artificial neural systems in high integrity hardware applications.","abstract_html":"This thesis investigates novel robust hardware elements for weightless artificial neural systems with a bias towards high integrity avionics applications. The author initially reviews the building blocks of physiological neural systems and then chronologically describes the development of weightless artificial neural systems. Several new design methodologies for the implementation of robust binary sum-and-threshold neurons are presented. The new techniques do not rely on weighted binary counters or registered arithmetic units for their operation making them less susceptible to transient single event upsets. They employ Boolean, weightless binary, asynchronous elements throughout thus increasing robustness in the presence of impulsive noise. Hierarchies formed from these neural elements are studied and a weightless probabilisitic activation function proposed for non-deterministic applications. Neuroram, an auto-associative memory created using these weightless neurons is described and analysed. The signal-to-noise ratio characteristics are compared with the traditional Hamming distance metric. This led to the proposal that neuroram can form a threshold logic based digital signal filter. Two weightless autoassociative memory based neuro-filters are presented and their filtration properties studied and compared with a traditional median filter. Eachn novel architecture was emulated using weightless numericM ATLAB code prior to schematic design and functional simulation. Several neural elements were implemented and validated using FPGA technology. A preliminary robustness evaluation was performed. The large scale particle accelerator at the Theodor Svedberg Laboratory at the University of Uppsala, Sweden, was used to generate transienut psetsin an FPGA performing a weightless binary neural function. One paper,two letters and five international patents have been published during the course of this research. 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The author has significantly contributed to the field of weightless artificial neural systems in high integrity hardware applications."]},{"key":"dc:format","label":"Dc Format","values":["application/pdf","text/xml"]},{"key":"dc:title","label":"Title","values":["Robust hardware elements for weightless artificial neural networks"]}]}],"canonical_facts":{"dc:creator":["Stevenson King, Douglas Beverley"],"dc:date":["2000-01"],"dc:date.issued":["2000-01"],"dc:description.abstract":["This thesis investigates novel robust hardware elements for weightless artificial neural systems with a bias towards high integrity avionics applications. The author initially reviews the building blocks of physiological neural systems and then chronologically describes the development of weightless artificial neural systems. Several new design methodologies for the implementation of robust binary sum-and-threshold neurons are presented. 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