{"id":{"repo_id":"catania","oai_identifier":"oai:www.iris.unict.it:20.500.11769/581189"},"canonical_url":"https://search.dev.ndltd.org/etd/catania/oai:www.iris.unict.it:20.500.11769/581189","repository":{"repo_id":"catania","name":"Università degli Studi di Catania","base_url":"https://www.iris.unict.it/oai/request"},"display":{"title":"STUDY AND CHARACTERIZATION OF INNOVATIVE CLEANING METHODS IN MICROELECTRONICS","abstract":"The purpose of this thesis was the investigation of issues that may affect the most critical interfaces constituting the electronic devices heart, such as Silicon/Gate Oxide interface, in the context of the technological development marked by the \"More than Moore\" law. As object of this study, one of the most used technologies in the semiconductor industry was used, namely the BCD8, a BCD technology owned by STMicroelectronics, which has such a great influence in semiconductor industry that it received an IEEE Milestone. In particular, consequences that an innovative process such as HF/HCl can induce on a critical interface such as Si/gate oxide have been analyzed, comparing with other pre-gate cleaning technologies, such as HF-last, which has been examined also in one of the cleaning steps with the greatest impact on Si surface chemical-physical characteristics, such as the drying step with IPA vapors. Different wafer typologies have been used, in order to evaluate the influence that previous manufacturing process flow can have on Si/gate oxide interface. Different pre-gate cleaning technologies have been compared by: TXRF (after metal contamination of Silicon surfaces), TOF-SIMS, haze and particle counting analysis. Moreover, the chemical oxide (native oxide) thickness, which is formed during the wet cleaning process, has been measured through Opti-probe measurements. In the same way, gate oxide thickness (around 40 Å) obtained in a vertical batch furnace has been measured for each pre-gate cleaning process. Gate oxide characteristics and iron contamination were examined non-destructively using Surface Photovoltage (SPV) minority carrier lifetime analysis and, finally, COCOS measurements have been done in order to investigate on Dit, Qtot, Qit, and Vfb after gate oxide process.","abstract_html":"The purpose of this thesis was the investigation of issues that may affect the most critical interfaces constituting the electronic devices heart, such as Silicon/Gate Oxide interface, in the context of the technological development marked by the "More than Moore" law. As object of this study, one of the most used technologies in the semiconductor industry was used, namely the BCD8, a BCD technology owned by STMicroelectronics, which has such a great influence in semiconductor industry that it received an IEEE Milestone. In particular, consequences that an innovative process such as HF/HCl can induce on a critical interface such as Si/gate oxide have been analyzed, comparing with other pre-gate cleaning technologies, such as HF-last, which has been examined also in one of the cleaning steps with the greatest impact on Si surface chemical-physical characteristics, such as the drying step with IPA vapors. Different wafer typologies have been used, in order to evaluate the influence that previous manufacturing process flow can have on Si/gate oxide interface. Different pre-gate cleaning technologies have been compared by: TXRF (after metal contamination of Silicon surfaces), TOF-SIMS, haze and particle counting analysis. Moreover, the chemical oxide (native oxide) thickness, which is formed during the wet cleaning process, has been measured through Opti-probe measurements. In the same way, gate oxide thickness (around 40 Å) obtained in a vertical batch furnace has been measured for each pre-gate cleaning process. Gate oxide characteristics and iron contamination were examined non-destructively using Surface Photovoltage (SPV) minority carrier lifetime analysis and, finally, COCOS measurements have been done in order to investigate on Dit, Qtot, Qit, and Vfb after gate oxide process.","abstract_has_math":false,"creators":["RUSSO, MARIAROBERTA"],"institution":"Università degli studi di Catania","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":["COMPAGNINI, Giuseppe Romano","MARLETTA, Giovanni"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-01-14","date_published":"2022-01-14","updated_at":"2026-07-24T01:35:19Z","subjects":["Surface conditioning technologies, Si/Gate oxide interface, Microelectronics"],"languages":["ita"],"rights":["info:eu-repo/semantics/closedAccess","license:PUBBLICO - Pubblico con Copyright","license uri:iris.PUB02"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"https://hdl.handle.net/20.500.11769/581189","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Russo, Mariaroberta","COMPAGNINI, Giuseppe Romano","MARLETTA, Giovanni"]},{"key":"dc:creator","label":"Author","values":["RUSSO, MARIAROBERTA"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2022-01-14"]},{"key":"dc:publisher","label":"Institution","values":["Università degli studi di Catania","place:Catania"]},{"key":"dc:type","label":"Dc Type","values":["info:eu-repo/semantics/doctoralThesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Surface conditioning technologies, Si/Gate oxide interface, Microelectronics"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["ita"]},{"key":"dc:rights","label":"Dc Rights","values":["info:eu-repo/semantics/closedAccess","license:PUBBLICO - Pubblico con Copyright","license uri:iris.PUB02"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://hdl.handle.net/20.500.11769/581189"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The purpose of this thesis was the investigation of issues that may affect the most critical interfaces constituting the electronic devices heart, such as Silicon/Gate Oxide interface, in the context of the technological development marked by the \"More than Moore\" law. As object of this study, one of the most used technologies in the semiconductor industry was used, namely the BCD8, a BCD technology owned by STMicroelectronics, which has such a great influence in semiconductor industry that it received an IEEE Milestone. In particular, consequences that an innovative process such as HF/HCl can induce on a critical interface such as Si/gate oxide have been analyzed, comparing with other pre-gate cleaning technologies, such as HF-last, which has been examined also in one of the cleaning steps with the greatest impact on Si surface chemical-physical characteristics, such as the drying step with IPA vapors. Different wafer typologies have been used, in order to evaluate the influence that previous manufacturing process flow can have on Si/gate oxide interface. Different pre-gate cleaning technologies have been compared by: TXRF (after metal contamination of Silicon surfaces), TOF-SIMS, haze and particle counting analysis. Moreover, the chemical oxide (native oxide) thickness, which is formed during the wet cleaning process, has been measured through Opti-probe measurements. In the same way, gate oxide thickness (around 40 Å) obtained in a vertical batch furnace has been measured for each pre-gate cleaning process. Gate oxide characteristics and iron contamination were examined non-destructively using Surface Photovoltage (SPV) minority carrier lifetime analysis and, finally, COCOS measurements have been done in order to investigate on Dit, Qtot, Qit, and Vfb after gate oxide process."]},{"key":"dc:title","label":"Title","values":["STUDY AND CHARACTERIZATION OF INNOVATIVE CLEANING METHODS IN MICROELECTRONICS"]}]}],"canonical_facts":{"dc:contributor":["Russo, Mariaroberta","COMPAGNINI, Giuseppe Romano","MARLETTA, Giovanni"],"dc:creator":["RUSSO, MARIAROBERTA"],"dc:date":["2022-01-14"],"dc:description":["The purpose of this thesis was the investigation of issues that may affect the most critical interfaces constituting the electronic devices heart, such as Silicon/Gate Oxide interface, in the context of the technological development marked by the \"More than Moore\" law. As object of this study, one of the most used technologies in the semiconductor industry was used, namely the BCD8, a BCD technology owned by STMicroelectronics, which has such a great influence in semiconductor industry that it received an IEEE Milestone. In particular, consequences that an innovative process such as HF/HCl can induce on a critical interface such as Si/gate oxide have been analyzed, comparing with other pre-gate cleaning technologies, such as HF-last, which has been examined also in one of the cleaning steps with the greatest impact on Si surface chemical-physical characteristics, such as the drying step with IPA vapors. Different wafer typologies have been used, in order to evaluate the influence that previous manufacturing process flow can have on Si/gate oxide interface. Different pre-gate cleaning technologies have been compared by: TXRF (after metal contamination of Silicon surfaces), TOF-SIMS, haze and particle counting analysis. Moreover, the chemical oxide (native oxide) thickness, which is formed during the wet cleaning process, has been measured through Opti-probe measurements. In the same way, gate oxide thickness (around 40 Å) obtained in a vertical batch furnace has been measured for each pre-gate cleaning process. Gate oxide characteristics and iron contamination were examined non-destructively using Surface Photovoltage (SPV) minority carrier lifetime analysis and, finally, COCOS measurements have been done in order to investigate on Dit, Qtot, Qit, and Vfb after gate oxide process."],"dc:identifier":["https://hdl.handle.net/20.500.11769/581189"],"dc:language":["ita"],"dc:publisher":["Università degli studi di Catania","place:Catania"],"dc:rights":["info:eu-repo/semantics/closedAccess","license:PUBBLICO - Pubblico con Copyright","license uri:iris.PUB02"],"dc:subject":["Surface conditioning technologies, Si/Gate oxide interface, Microelectronics"],"dc:title":["STUDY AND CHARACTERIZATION OF INNOVATIVE CLEANING METHODS IN MICROELECTRONICS"],"dc:type":["info:eu-repo/semantics/doctoralThesis"]},"updated_at":"2026-07-24T01:35:19Z"}