Design of a scheduling mechanism for an ATM switch

In this dissenation, the candidate proposes the use of a ratio to multiply the weights used in the matching algorithm to control the delay that individual connections encounter. We demonstrate the improved characteristics of a switch using a ratio presenting results from simulations. The candidate also proposes a novel scheduling mechanism for an input queued ATM switch. In order to evaluate the performance of the scheduling mechanism in terms of throughput and fairness, the use of various metrics, initially proposed in the literature to evaluate output buffered switches are evaluated, adjusted and applied to input scheduling. In particular the Worst-case Fairness Index (WFl) which measures the maximum delay a connection will encounter is derived for use in input queued switches.

Grantor dc:publisher.institution

Department of Electrical Engineering

Year dc:date.issued

2003

Author dc:creator

• Harvey, Nicholas Oliver

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/11427/5207

OAI identifier oai:identifier

oai:open.uct.ac.za:11427/5207