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Department of Electrical Engineering

Evaluating FFT Implementations Developed for use on FPGA Hardware

Abstract

dc:description.abstract

The Fast Fourier Transform (FFT) is an important algorithm within the field of radio astronomy, where it is used as a key processing component in the digital signal processing (DSP) backends of radio spectrometers. Field Programmable Gate Arrays (FPGAs) are a type of hardware commonly used to perform the various computations required to process incoming radio signals, including the FFT. As the FFT is a pivotal part of the DSP chain, the performance of the FFT implementation is a primary consideration when designing radio instruments. Here, performance measurements include numerical accuracy, logic resource utilisation and maximum clock rates at which the implementation can be operated. This research project investigates, tests and compares three different FFT cores, namely the CASPER wideband, ASTRON wideband, and Xilinx SSR FFTs, implemented for use on FPGA hardware. The hardware on which these FFTs are tested are the Square Kilometer Array Reconfigurable Application Board (SKARAB) and the Xilinx Alveo AU50 Accelerator Card. Testing metrics have been selected specifically for radio astronomy applications and include Spurious Free Dynamic Range (SFDR), signal-to-noise ratio (SNR) preservation, quantisation noise, resource utilisation and achievable clock rates. A double precision floating point software FFT, the Fastest Fourier Transform in the West (FFTW), has been selected as the benchmark against which the numerical accuracy of the FFT cores under test are compared. Results of this research project indicate that, when tested under the same conditions for default configuration options, the Xilinx core performs with the greatest degree of numerical accuracy and the ASTRON core with the least. While the CASPER core in its default state performs to a slightly lesser degree of accuracy than its Xilinx equivalent, this core can be configured in such a way that its performance is greatly improved - resulting in highly accurate results that surpass the performance of all other cores. The ASTRON and Xilinx cores do not provide the same configuration options that would allow for the same level of improvement. From a hardware resource utilisation perspective, ASTRON is the least resource efficient core and the CASPER core the most efficient. Both CASPER and Xilinx cores are capable of achieving clock rates between 450MHz-600MHz on Xilinx UltraScale+ hardware, while the ASTRON core failed to achieve a clock rate of 200MHz for the same test configuration.

Degree

thesis:*
Grantor
Department of Electrical Engineering
Year dc:date.issued
2023

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Brown, Morag
Advisor dc:contributor.advisor
  • Schonken, Willem

Subjects

dc:subject × 1

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/11427/39297
OAI identifier oai:identifier
oai:open.uct.ac.za:11427/39297

Chain of custody

source
Harvested from
University of Cape Town
Base URL
open.uct.ac.za/oai/request
Last updated
2026-07-22
Source record
OAI-PMH GetRecord
related terms
citation

Brown, Morag. Evaluating FFT Implementations Developed for use on FPGA Hardware. Department of Electrical Engineering, 2023. http://hdl.handle.net/11427/39297