Performance of a ATM Lan switching fabric

This thesis provides a focus on the architecture of a high-speed packet switching fabric and its performance. The switching fabric is suited for existing transparent protocols, based on Asynchronous Transfer Mode (ATM) technology and standards in an environment of Local Area Network (LAN). A high-speed switching fabric architecture which adopts Time Division mode and bases on a shared medium approach is proposed. This is an architecture for nonblocking performance, no congestion and high reliability. Its principle for performance is a method of sequentially scheduling the inputs and the transferring of bits in parallel. To study the performance of the switching fabric architecture one uses OPNET communication simulation software. Some parameters including the throughputs, the transfer (the switching fabric) delay, the switching overflow and the packet size in the buffer (the input buffer and the output buffer) are implemented through the simulation. And finally, an analysis for the results of the simulation for local ATM IDS fabric architecture is discussed. The results display an architecture that provides a rational design with some expected characteristics.

Grantor dc:publisher.institution

Department of Electrical Engineering

Year dc:date.issued

1998

Author dc:creator

• Yu, Lianghong

Advisor dc:contributor.advisor

• Ventura, M J

Language dc:language.iso

eng

Handle dc:identifier.uri

http://hdl.handle.net/11427/26109

OAI identifier oai:identifier

oai:open.uct.ac.za:11427/26109