{"id":{"repo_id":"cape-town","oai_identifier":"oai:open.uct.ac.za:11427/12774"},"canonical_url":"https://search.dev.ndltd.org/etd/cape-town/oai:open.uct.ac.za:11427/12774","repository":{"repo_id":"cape-town","name":"University of Cape Town","base_url":"https://open.uct.ac.za/oai/request"},"display":{"title":"The design and development of a pulsed radar block for the Rhino platform","abstract":"The Reconfigurable Hardware Interface for computiNg and radiO (Rhino) Platform is an FPGA based computing platform designed at the University of Cape Town to provide an FPGA resource that is both affordable and easy to learn and use in research and skills development in the areas of Software Designed Radio, Radio Astronomy and Cognitive Radio. A fremework comprising reusable radar processing modules (referred to in this text as \"Radar Blocks\") has been implemented on the Rhino and allows users to control simple pulse radar. The pulse radar application is implemented on the FPGA using the radar blocks framework which allows each block to be configured from the ARM processor to adapt settings during experiments. This project developed blocks for the communications bus, Gigabit Ethernet and simple pulse radar.","abstract_html":"The Reconfigurable Hardware Interface for computiNg and radiO (Rhino) Platform is an FPGA based computing platform designed at the University of Cape Town to provide an FPGA resource that is both affordable and easy to learn and use in research and skills development in the areas of Software Designed Radio, Radio Astronomy and Cognitive Radio. A fremework comprising reusable radar processing modules (referred to in this text as &quot;Radar Blocks&quot;) has been implemented on the Rhino and allows users to control simple pulse radar. The pulse radar application is implemented on the FPGA using the radar blocks framework which allows each block to be configured from the ARM processor to adapt settings during experiments. This project developed blocks for the communications bus, Gigabit Ethernet and simple pulse radar.","abstract_has_math":false,"creators":["Raw, Bruce"],"institution":"Department of Electrical Engineering","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":["Winberg, Simon","Inggs, Michael"],"committee_chairs":[],"committee_members":[],"year":2012,"date_issued":"2012","date_published":"2012","updated_at":"2026-07-22T22:23:12Z","subjects":[],"languages":["eng"],"rights":[],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/11427/12774","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Winberg, Simon","Inggs, Michael"]},{"key":"dc:creator","label":"Author","values":["Raw, Bruce"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2015-05-13T14:09:23Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2015-05-13T14:09:23Z"]},{"key":"dc:date.issued","label":"Date","values":["2012"]},{"key":"dc:publisher.department","label":"Dc Publisher Department","values":["Department of Electrical Engineering"]},{"key":"dc:publisher.institution","label":"Dc Publisher Institution","values":["University of Cape Town"]},{"key":"dc:type","label":"Dc Type","values":["Master Thesis"]},{"key":"dc:type.qualificationlevel","label":"Dc Type Qualificationlevel","values":["Masters"]},{"key":"dc:type.qualificationname","label":"Dc Type Qualificationname","values":["MSc"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language.iso","label":"Language (ISO)","values":["eng"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/11427/12774"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["Includes bibliographical references."]},{"key":"dc:description.abstract","label":"Abstract","values":["The Reconfigurable Hardware Interface for computiNg and radiO (Rhino) Platform is an FPGA based computing platform designed at the University of Cape Town to provide an FPGA resource that is both affordable and easy to learn and use in research and skills development in the areas of Software Designed Radio, Radio Astronomy and Cognitive Radio. A fremework comprising reusable radar processing modules (referred to in this text as \"Radar Blocks\") has been implemented on the Rhino and allows users to control simple pulse radar. The pulse radar application is implemented on the FPGA using the radar blocks framework which allows each block to be configured from the ARM processor to adapt settings during experiments. This project developed blocks for the communications bus, Gigabit Ethernet and simple pulse radar."]},{"key":"dc:title","label":"Title","values":["The design and development of a pulsed radar block for the Rhino platform"]}]}],"canonical_facts":{"dc:contributor.advisor":["Winberg, Simon","Inggs, Michael"],"dc:creator":["Raw, Bruce"],"dc:date.accessioned":["2015-05-13T14:09:23Z"],"dc:date.available":["2015-05-13T14:09:23Z"],"dc:date.issued":["2012"],"dc:description":["Includes bibliographical references."],"dc:description.abstract":["The Reconfigurable Hardware Interface for computiNg and radiO (Rhino) Platform is an FPGA based computing platform designed at the University of Cape Town to provide an FPGA resource that is both affordable and easy to learn and use in research and skills development in the areas of Software Designed Radio, Radio Astronomy and Cognitive Radio. A fremework comprising reusable radar processing modules (referred to in this text as \"Radar Blocks\") has been implemented on the Rhino and allows users to control simple pulse radar. The pulse radar application is implemented on the FPGA using the radar blocks framework which allows each block to be configured from the ARM processor to adapt settings during experiments. This project developed blocks for the communications bus, Gigabit Ethernet and simple pulse radar."],"dc:identifier.uri":["http://hdl.handle.net/11427/12774"],"dc:language.iso":["eng"],"dc:publisher.department":["Department of Electrical Engineering"],"dc:publisher.institution":["University of Cape Town"],"dc:title":["The design and development of a pulsed radar block for the Rhino platform"],"dc:type":["Master Thesis"],"dc:type.qualificationlevel":["Masters"],"dc:type.qualificationname":["MSc"]},"updated_at":"2026-07-22T22:23:12Z"}