Passivation of III–V Nanowires Using Dielectrics Deposited by Atomic Layer Deposition
III–V semiconductor nanowires have many uses in (opto)electronic applications including infrared photodetectors and photovoltaic cells [1], tunnelling field-effect transistors (TFETs) [2] and high-frequency transistors [ 3]. Indium arsenide (InAs) is of interest as it has a direct narrow band gap of 0.36 eV at 300 K and 0.40 eV at 77 K [4], an electron affinity around 4.9 eV [ 4] and high electron mobilities ranging from 20,000 and 60,000 cm² V¯¹ s¯¹ at temperatures of 300 and 77 K respectively [4]. Nanowires (NWs) feature high surface area-to-volume ratios, and consequently their optical and electrical properties are strongly affected by surface states [5]. Furthermore, the native oxide on InAs NWs contains trap sites for electrons and their energies lie in the InAs conduction band. Therefore, controlling the electrical characteristics of these III–V NWs via surface passivation and encapsulation will be essential for their adoption into commercial applications. This thesis investigates surface passivation of InAs nanowire field-effect transistors (NWFETs) using alumina dielectric layers [6]. Passivation refers to the removal of the native oxide which contains charge carrier traps sites using trymethyl aluminium [6, 7] and removing dangling bonds using ammonium sulphide [8,9]. Alumina was deposited by atomic layer deposition (ALD) using trimethylaluminium (TMA) as the aluminium precursor and H₂O or oxygen plasma as the oxygen sources. NWFETs were encapsulated with alumina over a range of deposition temperatures from 85 to 300 °C and a range of layer thicknesses from 3 to 50 nm. The alumina was deposited using both plasma-enhanced and thermal ALD methods. The electrical characteristics measured include field-effect mobility, on/off current ratio, forward and backward threshold voltage and hysteresis. The quality of the alumina that encapsulated the devices was determined by the refractive index and growth rate per ALD cycle using imaging ellipsometry. In all cases where alumina was applied to InAs NWs the peak current for a given source-drain bias was increased. This increase in the maximum on-state current could attributed to the chemical reduction and removal of the NW native oxide by reaction with the TMA precursor during the ALD process [7]. This native oxide contains electron trapping sites and enhances charge carrier scattering within the NW channel, therefore its removal could enhance the on-state current. In most cases, field-effect mobility is also increased after alumina encapsulation, indicating the possible removal of charge carrier scattering sites at the nanowire surface. Hysteresis was also reduced after alumina passivation, which would suggest the removal of surface electron trap sites responsible for hysteresis. After alumina deposition, negative photoconductivity (NPC) effects were reduced for both the forward and backward voltage sweeps. One key parameter optimised during this study is deposition temperature during thermal ALD. Changes in the deposition temperature are known to affect the reaction kinetics [6]. Deposition temperature was therefore hypothesised to change the reduction chemistry of the InAs native oxide and the deposition rate of the alumina film, ultimately affecting NWFET performance. At higher temperatures, the films deposited tended to be denser and therefore contain fewer defects [10]. Imaging ellipsometry showed that alumina film growth per ALD cycle (GPC) increased with deposition temperature. Alumina films deposited at deposition temperatures of 120 °C were etched almost twice as quickly as those deposited at deposition temperatures of 200 °C when using the etchant AZ726, indicating that films deposited at higher temperatures are denser and more defect-free. Field-effect mobility was not significantly changed after encapsulation, the on/off-current ratio decreased at deposition temperatures above 200 °C for thermal ALD. Device behaviour remained stable over a period of seven months when encapsulated with alumina. Plasma-enhanced ALD (PEALD), using oxygen plasma, was tested as an alternative method of encapsulation whereby the cracking of reaction precursors is facilitated by the plasma. Devices were encapsulated with 50 nm of alumina using PEALD at deposition temperatures ranging from 200 to 300 °C. There was a significant performance increase in device field-effect mobility after encapsulation with alumina. The effects of NPC and hysteresis were significantly reduced after encapsulation, indicating that PEALD-deposited alumina could passivate surface trap states associated with NPC. Ionic liquid-gated NWFETs were used to determine the effectiveness of ALD alumina passivation on an alternative device architecture whereby electrostatic control is achieved by the presence of an electron double layer surrounding the nanowire channel. In addition to its passivation properties, alumina encapsulation increases the separation between the electron double layer and the nanowire channel to limit electrostatic gating. 1-Butyl-3-methylimidazolium hexafluorophosphate (BMIM-PF6) was the ionic liquid used for ion gating. The ionic liquid gated devices were encapsulated with an ultra-thin (3 nm) layer of alumina using thermal ALD at a deposition temperature of 200 °C. These devices were tested before and after encapsulation and using both ion gate and back gate configurations. When the devices were operated with a sweep rate faster than 174 mV s¯¹ they failed to switch on as they ions in the liquid do not have enough time to accumulate at the NW surface A sweep rate of 19 mV s¯¹ was used for all ionic liquid-gated tests. Encapsulation of the InAs NWFETs reduced the on/off current ratio when operated in an ion gate configuration with no change in transconductance. When the same NWFETs were operated in a back gate configuration the on/off-current ratio was decreased but the transconductance was increased significantly. When the devices were operated in an ion-gated configuration there was no change in device electrical characteristics (transconductance, on/off-current ratio, forward and backward threshold voltage, and hysteresis) when the devices were illuminated during testing. It was concluded that NPC is not present in the devices when operating in an ion-gated configuration. This lack of performance change due to illumination was evident in devices before and after encapsulation. This work demonstrates that there are trade-offs to be considered in device performance after encapsulation. Lower deposition temperatures gave improved on/off current ratios but the resulting alumina layers were more easily etched. Low temperature encapsulation is of particular use for NWFETs devices fabricated on temperature sensitive substrates such as polymers. PEALD encapsulation provides a means of encapsulating NWFETs on moisture- sensitive substrates and can improve device field-effect mobility, however not all substrates can tolerate plasma environments. Ionic liquid-gated NWFETs offer a means of coupling ionic and electrical systems at a cost of switching speed. Ion gated devices showed decreased on/off-current ratios after encapsulation.
ALD, alumina, deposition, dielectric, InAs, indium arsenide, Nanowire, NWFET, passivation, temperature, Transistor
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