Abstract
dc:description.abstractThe rapid growth of cloud computing and data-intensive applications necessitates optical switching technologies with ultra-low crosstalk, high bandwidth, and nanosecond-scale reconfigurability. This work presents a comprehensive study of 3D Si-SiN-SiN tri-layer optical switches employing switch-and-select (S&S) architectures for strictly non-blocking connectivity. The 3D crossing-free waveguide shuffle eliminates in-plane intersections, significantly reducing crosstalk (as low as -51.9 dB) and insertion loss (as low as 2.1 dB) while enabling scalable, high-density photonic integration. Two distinct implementations: a thermo-optic microring resonator (MRR)-based 8×8 switch and an electro-optic microdisk switch are demonstrated, both leveraging the tri-layer platform to achieve >70 GHz bandwidth and sub-microsecond to nanosecond switching speeds. The thermo-optic device achieves crosstalk suppression of −33.2 to −50.8 dB and on-chip losses of 2.1–10.5 dB with micro-second scale switching time, while the electro-optic variant reduces switching times to 5.9 ns (rise) and 2.8 ns (fall) with crosstalk ratios as low as −51.9 dB. A dedicated control framework enables automated calibration and simultaneous multicasting/switching operations, validated through fronthaul experiments using 64-QAM LTE signals with >40 dB RF dynamic range and <1.8% error vector magnitude (EVM). Future work will focus on lossless optical switching systems through advanced material engineering (e.g., low-loss SiN waveguides with optimized adiabatic tapers) and hybrid modulation schemes combining electro-optic and thermo-optic tuning. Additionally, we aim to integrate fault-tolerant control algorithms and machine learning-driven optimization to further minimize insertion loss (<1 dB) and enable dynamic reconfiguration for terabit-scale data centre networks. By addressing scalability and energy efficiency challenges, this work paves the way for next-generation optical interconnects in cloud radio access networks (C-RAN) and ultra-low-latency computing architectures.
Degree
thesis:*- Name dc:type.qualificationname
- Doctor of Philosophy (PhD)
- Level dc:type.qualificationlevel
- Doctoral
- Grantor dc:publisher.institution
- University of Cambridge
- Year dc:date.issued
- 2025
Author and committee
dc:creator, dc:contributor.*- Author dc:creator
-
- Sun, Bohao
- Advisor dc:contributor.advisor
-
- Penty, Richard
Subjects
dc:subject × 4Rights
dc:rights- Licence
- Language dc:language
- eng
Identifiers
dc:identifier.*- DOI dc:identifier.doi
- https://doi.org/10.17863/CAM.122571
- OAI identifier oai:identifier
- oai:www.repository.cam.ac.uk:1810/391434