{"id":{"repo_id":"cambridge","oai_identifier":"oai:www.repository.cam.ac.uk:1810/336062"},"canonical_url":"https://search.dev.ndltd.org/etd/cambridge/oai:www.repository.cam.ac.uk:1810/336062","repository":{"repo_id":"cambridge","name":"Cambridge University","base_url":"https://api.repository.cam.ac.uk/server/oai/request"},"display":{"title":"Expansibility Evaluation of a Two-dimensional Access Array for Quantum Computing","abstract":"The main challenge in quantum computing is not how to make qubits, but how to make a lot of them. Especially, the one-qubit-one-input approach is unsustainable for higher numbers. This issue has already been resolved in classical computing, and I investigate a similar solution for quantum. I evaluate the expansibility prospects of a multiplexing chip: a two-dimensional access array, designed to combat this very problem. First, I characterize on-chip integrated transistors. I list their standard transport parameters, such as threshold voltage, subthreshold swing, and drain induced barrier lowering. Additionally, I report Coulomb oscillations and the formation of quantum dots in 40 nm commercially-available MOSFET devices. I benchmark those against a finFET of the same dimensions, designed for quantum operation. I reflect on the readiness of industrial CMOS devices for use in quantum computing. Then, I assess the operation of control transistors in a memory cell structure. I analyze retention times and comment on their usability for a refresh mechanism and time-multiplexed access to quantum information. Afterward, I demonstrate the mechanism of gate-based reflectometry readout. I detail the RF circuitry, including the room-temperature equipment, and the on-chip analog LC resonators. I present my findings on tuning individual parameters, and their impact on the signal quality, quantitatively depicted by the signal-to-noise ratio and Q factor comparison. I explain the difficulties faced with managing the readout at several GHz, and some other challenges, including parasitics-induced frequency shift and overlap. Finally, I demonstrate time- and frequency-domain multiplexing for an integrated array, as well as two different cointegrated architectures.","abstract_html":"The main challenge in quantum computing is not how to make qubits, but how to make a lot of them. Especially, the one-qubit-one-input approach is unsustainable for higher numbers. This issue has already been resolved in classical computing, and I investigate a similar solution for quantum. I evaluate the expansibility prospects of a multiplexing chip: a two-dimensional access array, designed to combat this very problem. First, I characterize on-chip integrated transistors. I list their standard transport parameters, such as threshold voltage, subthreshold swing, and drain induced barrier lowering. Additionally, I report Coulomb oscillations and the formation of quantum dots in 40 nm commercially-available MOSFET devices. I benchmark those against a finFET of the same dimensions, designed for quantum operation. I reflect on the readiness of industrial CMOS devices for use in quantum computing. Then, I assess the operation of control transistors in a memory cell structure. I analyze retention times and comment on their usability for a refresh mechanism and time-multiplexed access to quantum information. Afterward, I demonstrate the mechanism of gate-based reflectometry readout. I detail the RF circuitry, including the room-temperature equipment, and the on-chip analog LC resonators. I present my findings on tuning individual parameters, and their impact on the signal quality, quantitatively depicted by the signal-to-noise ratio and Q factor comparison. I explain the difficulties faced with managing the readout at several GHz, and some other challenges, including parasitics-induced frequency shift and overlap. Finally, I demonstrate time- and frequency-domain multiplexing for an integrated array, as well as two different cointegrated architectures.","abstract_has_math":false,"creators":["Michniewicz, John"],"institution":"University of Cambridge","degree_name":"Doctor of Philosophy (PhD)","degree_level":"Doctoral","degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":["Ciccarelli, Chiara"],"committee_chairs":[],"committee_members":[],"year":2021,"date_issued":"2021-12-24","date_published":"2021-12-24","updated_at":"2026-07-22T22:24:23Z","subjects":["quantum","quantum computing","spinqubits","silicon","reflectometry","gate-based sensing","qubit","qubits","quantum dot","multiplexing","FDM","TDM"],"languages":["eng"],"rights":[],"rights_urls":["https://creativecommons.org/licenses/by/4.0/"],"identifier_entries":[]},"links":{"outbound_url":"https://doi.org/10.17863/CAM.83492","outbound_label":"DOI","outbound_source":"dc:identifier.doi"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Ciccarelli, Chiara"]},{"key":"dc:creator","label":"Author","values":["Michniewicz, John"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.issued","label":"Date","values":["2021-12-24"]},{"key":"dc:publisher.institution","label":"Dc Publisher Institution","values":["University of Cambridge"]},{"key":"dc:relation.isreferencedby.uri","label":"Dc Relation Isreferencedby URI","values":["https://www.repository.cam.ac.uk/handle/1810/336062"]},{"key":"dc:type","label":"Dc Type","values":["Thesis"]},{"key":"dc:type.qualificationlevel","label":"Dc Type Qualificationlevel","values":["Doctoral"]},{"key":"dc:type.qualificationname","label":"Dc Type Qualificationname","values":["Doctor of Philosophy (PhD)"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["quantum","quantum computing","spinqubits","silicon","reflectometry","gate-based sensing","qubit","qubits","quantum dot","multiplexing","FDM","TDM"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["https://creativecommons.org/licenses/by/4.0/"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.doi","label":"DOI","values":["10.17863/CAM.83492"]},{"key":"dc:identifier.uri","label":"Identifier URI","values":["https://apollo8-f-pro.lib.cam.ac.uk/bitstreams/c3f5306c-ef3e-4e19-81c4-51060a2edee1/download"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["The main challenge in quantum computing is not how to make qubits, but how to make a lot of them. Especially, the one-qubit-one-input approach is unsustainable for higher numbers. This issue has already been resolved in classical computing, and I investigate a similar solution for quantum. I evaluate the expansibility prospects of a multiplexing chip: a two-dimensional access array, designed to combat this very problem. First, I characterize on-chip integrated transistors. I list their standard transport parameters, such as threshold voltage, subthreshold swing, and drain induced barrier lowering. Additionally, I report Coulomb oscillations and the formation of quantum dots in 40 nm commercially-available MOSFET devices. I benchmark those against a finFET of the same dimensions, designed for quantum operation. I reflect on the readiness of industrial CMOS devices for use in quantum computing. Then, I assess the operation of control transistors in a memory cell structure. I analyze retention times and comment on their usability for a refresh mechanism and time-multiplexed access to quantum information. Afterward, I demonstrate the mechanism of gate-based reflectometry readout. I detail the RF circuitry, including the room-temperature equipment, and the on-chip analog LC resonators. I present my findings on tuning individual parameters, and their impact on the signal quality, quantitatively depicted by the signal-to-noise ratio and Q factor comparison. I explain the difficulties faced with managing the readout at several GHz, and some other challenges, including parasitics-induced frequency shift and overlap. Finally, I demonstrate time- and frequency-domain multiplexing for an integrated array, as well as two different cointegrated architectures."]},{"key":"dc:format.checksum.md5","label":"Dc Format Checksum Md5","values":["b4c5f8d49d546b671b2d37961783cdb6"]},{"key":"dc:title","label":"Title","values":["Expansibility Evaluation of a Two-dimensional Access Array for Quantum Computing"]}]}],"canonical_facts":{"dc:contributor.advisor":["Ciccarelli, Chiara"],"dc:creator":["Michniewicz, John"],"dc:date.issued":["2021-12-24"],"dc:description.abstract":["The main challenge in quantum computing is not how to make qubits, but how to make a lot of them. Especially, the one-qubit-one-input approach is unsustainable for higher numbers. This issue has already been resolved in classical computing, and I investigate a similar solution for quantum. I evaluate the expansibility prospects of a multiplexing chip: a two-dimensional access array, designed to combat this very problem. First, I characterize on-chip integrated transistors. I list their standard transport parameters, such as threshold voltage, subthreshold swing, and drain induced barrier lowering. Additionally, I report Coulomb oscillations and the formation of quantum dots in 40 nm commercially-available MOSFET devices. I benchmark those against a finFET of the same dimensions, designed for quantum operation. I reflect on the readiness of industrial CMOS devices for use in quantum computing. Then, I assess the operation of control transistors in a memory cell structure. I analyze retention times and comment on their usability for a refresh mechanism and time-multiplexed access to quantum information. Afterward, I demonstrate the mechanism of gate-based reflectometry readout. I detail the RF circuitry, including the room-temperature equipment, and the on-chip analog LC resonators. I present my findings on tuning individual parameters, and their impact on the signal quality, quantitatively depicted by the signal-to-noise ratio and Q factor comparison. I explain the difficulties faced with managing the readout at several GHz, and some other challenges, including parasitics-induced frequency shift and overlap. Finally, I demonstrate time- and frequency-domain multiplexing for an integrated array, as well as two different cointegrated architectures."],"dc:format.checksum.md5":["b4c5f8d49d546b671b2d37961783cdb6"],"dc:identifier.doi":["10.17863/CAM.83492"],"dc:identifier.uri":["https://apollo8-f-pro.lib.cam.ac.uk/bitstreams/c3f5306c-ef3e-4e19-81c4-51060a2edee1/download"],"dc:language":["eng"],"dc:publisher.institution":["University of Cambridge"],"dc:relation.isreferencedby.uri":["https://www.repository.cam.ac.uk/handle/1810/336062"],"dc:rights":["https://creativecommons.org/licenses/by/4.0/"],"dc:subject":["quantum","quantum computing","spinqubits","silicon","reflectometry","gate-based sensing","qubit","qubits","quantum dot","multiplexing","FDM","TDM"],"dc:title":["Expansibility Evaluation of a Two-dimensional Access Array for Quantum Computing"],"dc:type":["Thesis"],"dc:type.qualificationlevel":["Doctoral"],"dc:type.qualificationname":["Doctor of Philosophy (PhD)"]},"updated_at":"2026-07-22T22:24:23Z"}