High power wide bandgap cascode switching circuits
type: CreativeWork
description: Emerging wide bandgap (WBG) power transistors are capable of improving the efficiency of mains voltage power electronic circuits. Several commercial WBG transistors are now available, but all exhibit undesirable gate drive characteristics. The cascode circuit has been suggested as a solution to this problem: WBG cascodes improve the switching speed, gate characteristics and noise immunity of devices, at the expense of greater on-state resistance. WBG cascodes have not, however, been widely accepted in commercial applications. Previous research has typically been too application-specific, with little practical information available for design engineers wishing to use them. This thesis addresses these shortcomings through a comprehensive investigation of practical design considerations for switch-mode cascode circuits. A SPICE simulation and simplified mathematical model are developed as design tools to give a detailed insight into cascode hard-switching behaviour and to aid cascode optimisation and device selection. The effects of the cascode configuration on static (DC) device performance are quantified for a silicon super-junction (SJ) metal-oxide-semiconductor field-effect transistor (MOSFET), silicon carbide (SiC) junction field-effect transistor JFET and SiC MOSFET. The on-state resistance penalty of the cascode configuration is shown to be modest and potentially mitigated by careful selection of HV transistor gate bias. There are few advantages to using silicon SJ MOSFETs in a cascode configuration, but both SiC MOSFET and JFET cascodes benefit from improved gate drive, reverse conduction and switching characteristics. SiC MOSFETs are shown to be better suited to efficient high temperature operation, while SiC JFETs are more appropriate for high current applications. Cascode switching losses are shown to be reduced compared to standalone devices, although reverse recovery losses can counteract this. Methods of controlling switching transients using gate resisto…
abstract: Emerging wide bandgap (WBG) power transistors are capable of improving the efficiency of mains voltage power electronic circuits. Several commercial WBG transistors are now available, but all exhibit undesirable gate drive characteristics. The cascode circuit has been suggested as a solution to this problem: WBG cascodes improve the switching speed, gate characteristics and noise immunity of devices, at the expense of greater on-state resistance. WBG cascodes have not, however, been widely accepted in commercial applications. Previous research has typically been too application-specific, with little practical information available for design engineers wishing to use them. This thesis addresses these shortcomings through a comprehensive investigation of practical design considerations for switch-mode cascode circuits. A SPICE simulation and simplified mathematical model are developed as design tools to give a detailed insight into cascode hard-switching behaviour and to aid cascode optimisation and device selection. The effects of the cascode configuration on static (DC) device performance are quantified for a silicon super-junction (SJ) metal-oxide-semiconductor field-effect transistor (MOSFET), silicon carbide (SiC) junction field-effect transistor JFET and SiC MOSFET. The on-state resistance penalty of the cascode configuration is shown to be modest and potentially mitigated by careful selection of HV transistor gate bias. There are few advantages to using silicon SJ MOSFETs in a cascode configuration, but both SiC MOSFET and JFET cascodes benefit from improved gate drive, reverse conduction and switching characteristics. SiC MOSFETs are shown to be better suited to efficient high temperature operation, while SiC JFETs are more appropriate for high current applications. Cascode switching losses are shown to be reduced compared to standalone devices, although reverse recovery losses can counteract this. Methods of controlling switching transients using gate resisto…
author: Garsed, Philip
language: en
license: https://apollo8-f-pro.lib.cam.ac.uk/bitstreams/7d89a504-1fe3-40ab-b246-4ae243272e73/download
license: https://www.rioxx.net/licenses/all-rights-reserved/
license: https://apollo8-f-pro.lib.cam.ac.uk/bitstreams/2c29026d-9fc9-4553-b64f-4ff466430cf3/download
date published: 2016-01-05
date modified: 2026-07-22T22:24:30Z
provider: Cambridge University
publisher: Networked Digital Library of Theses and Dissertations
type: WebPage
source organization: University of Cambridge

PropertyValue
property ID: DOI
value: 10.17863/CAM.6371