{"id":{"repo_id":"calpoly","oai_identifier":"oai:digitalcommons.calpoly.edu:theses-4039"},"canonical_url":"https://search.dev.ndltd.org/etd/calpoly/oai:digitalcommons.calpoly.edu:theses-4039","repository":{"repo_id":"calpoly","name":"Cal Poly","base_url":"https://digitalcommons.calpoly.edu/do/oai/"},"display":{"title":"Current-Source DC-DC Converter for Fiber-Optic Communication Systems","abstract":"<p>In this thesis, a proof of concept for a current-source DC-DC converter for powering sensors used in an underwater communications system is presented. The proposed converter steps down an input current of 0.9 A to 0.625 A, while maintaining an output voltage of 24 V and output power of 15 W. The complete steady-state analysis and design of the proposed converter in its single-stage form is also explained in detail. Performance evaluation of the proposed converter was carried out using LTspice. Results of the simulation demonstrate that the design was able to produce average output current of 0.639 A at maximum output power of 15.292 W while maintaining 24.39 V regulated output voltage. The overall efficiency of the converter was determined to be 88.73% and the output voltage ripple was calculated to be 0.4%, meeting the original specifications of the design.</p>","abstract_html":"&lt;p&gt;In this thesis, a proof of concept for a current-source DC-DC converter for powering sensors used in an underwater communications system is presented. The proposed converter steps down an input current of 0.9 A to 0.625 A, while maintaining an output voltage of 24 V and output power of 15 W. The complete steady-state analysis and design of the proposed converter in its single-stage form is also explained in detail. Performance evaluation of the proposed converter was carried out using LTspice. Results of the simulation demonstrate that the design was able to produce average output current of 0.639 A at maximum output power of 15.292 W while maintaining 24.39 V regulated output voltage. The overall efficiency of the converter was determined to be 88.73% and the output voltage ripple was calculated to be 0.4%, meeting the original specifications of the design.&lt;/p&gt;","abstract_has_math":false,"creators":["Jose, Jissell C"],"institution":null,"degree_name":"MS in Electrical Engineering","degree_level":null,"degree_discipline":"Electrical Engineering","degree_department":null,"school":null,"contributors":["Taufik","Electrical Engineering","College of Engineering"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2022,"date_issued":"2022-06-01T07:00:00Z","date_published":"2022-06-01T07:00:00Z","updated_at":"2026-07-24T01:32:37Z","subjects":["Power Electronics","Electrical and Computer Engineering","Electrical and Electronics","Power and Energy"],"languages":[],"rights":[],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["10.15368/theses.2022.32"],"render_values":[{"text":"10.15368/theses.2022.32","href":"https://doi.org/10.15368/theses.2022.32","code":true}]}]},"links":{"outbound_url":"https://digitalcommons.calpoly.edu/theses/2453","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Taufik","Electrical Engineering","College of Engineering"]},{"key":"dc:creator","label":"Author","values":["Jose, Jissell C"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.available","label":"Dc Date Available","values":["2022-06-04T07:00:00Z"]},{"key":"thesis:degree_discipline","label":"Discipline","values":["Electrical Engineering"]},{"key":"thesis:degree_name","label":"Degree Name","values":["MS in Electrical Engineering"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Power Electronics","Electrical and Computer Engineering","Electrical and Electronics","Power and Energy"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://digitalcommons.calpoly.edu/theses/2453","10.15368/theses.2022.32"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["<p>In this thesis, a proof of concept for a current-source DC-DC converter for powering sensors used in an underwater communications system is presented. The proposed converter steps down an input current of 0.9 A to 0.625 A, while maintaining an output voltage of 24 V and output power of 15 W. The complete steady-state analysis and design of the proposed converter in its single-stage form is also explained in detail. Performance evaluation of the proposed converter was carried out using LTspice. Results of the simulation demonstrate that the design was able to produce average output current of 0.639 A at maximum output power of 15.292 W while maintaining 24.39 V regulated output voltage. The overall efficiency of the converter was determined to be 88.73% and the output voltage ripple was calculated to be 0.4%, meeting the original specifications of the design.</p>"]},{"key":"dc:title","label":"Title","values":["Current-Source DC-DC Converter for Fiber-Optic Communication Systems"]}]}],"canonical_facts":{"dc:contributor":["Taufik","Electrical Engineering","College of Engineering"],"dc:creator":["Jose, Jissell C"],"dc:date.available":["2022-06-04T07:00:00Z"],"dc:description.abstract":["<p>In this thesis, a proof of concept for a current-source DC-DC converter for powering sensors used in an underwater communications system is presented. The proposed converter steps down an input current of 0.9 A to 0.625 A, while maintaining an output voltage of 24 V and output power of 15 W. The complete steady-state analysis and design of the proposed converter in its single-stage form is also explained in detail. Performance evaluation of the proposed converter was carried out using LTspice. Results of the simulation demonstrate that the design was able to produce average output current of 0.639 A at maximum output power of 15.292 W while maintaining 24.39 V regulated output voltage. The overall efficiency of the converter was determined to be 88.73% and the output voltage ripple was calculated to be 0.4%, meeting the original specifications of the design.</p>"],"dc:identifier":["https://digitalcommons.calpoly.edu/theses/2453","10.15368/theses.2022.32"],"dc:subject":["Power Electronics","Electrical and Computer Engineering","Electrical and Electronics","Power and Energy"],"dc:title":["Current-Source DC-DC Converter for Fiber-Optic Communication Systems"],"thesis:degree_discipline":["Electrical Engineering"],"thesis:degree_name":["MS in Electrical Engineering"]},"updated_at":"2026-07-24T01:32:37Z"}