{"id":{"repo_id":"cagliari","oai_identifier":"oai:iris.unica.it:11584/266860"},"canonical_url":"https://search.dev.ndltd.org/etd/cagliari/oai:iris.unica.it:11584/266860","repository":{"repo_id":"cagliari","name":"Università di Cagliari","base_url":"https://iris.unica.it/oai/request"},"display":{"title":"Redundant analog to digital conversion architectures in CMOS technology","abstract":"The operation of modern electronic devices in different fields as communications, signal processing, and sensor interface is critically affected with robust, high performance and scalable Analog-to-Digital Converter (ADCs), that can be considered as one of the main blocks in many systems, since they are mandatory to make the link between the analog outside world and the evermore-ubiquitous digital computer world. The design of these ADCs come distinct tradeoffs between speed, power, resolution, and die area embodied within many data conversion architectural variations. The flash ADC structure are often the base structure for high-speed operation and simple architecture analog-to-digital converters (ADCs). As the input signal is applied to (2","abstract_html":"The operation of modern electronic devices in different fields as communications, signal processing, and sensor interface is critically affected with robust, high performance and scalable Analog-to-Digital Converter (ADCs), that can be considered as one of the main blocks in many systems, since they are mandatory to make the link between the analog outside world and the evermore-ubiquitous digital computer world. The design of these ADCs come distinct tradeoffs between speed, power, resolution, and die area embodied within many data conversion architectural variations. The flash ADC structure are often the base structure for high-speed operation and simple architecture analog-to-digital converters (ADCs). As the input signal is applied to (2","abstract_has_math":false,"creators":["EL RACHINI, ALI"],"institution":"Università degli Studi di Cagliari","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2015,"date_issued":"2015-07-27","date_published":"2015-07-27","updated_at":"2026-07-24T01:30:09Z","subjects":["Analog-to-digital converter","Flash ADC","Multi-stage ADCs","Settore ING-INF/01 - Elettronica"],"languages":["eng"],"rights":["info:eu-repo/semantics/openAccess","license:Non specificato"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/11584/266860","outbound_label":"Handle","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:creator","label":"Author","values":["EL RACHINI, ALI"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date","label":"Dc Date","values":["2015-07-27"]},{"key":"dc:publisher","label":"Institution","values":["Università degli Studi di Cagliari"]},{"key":"dc:relation","label":"Dc Relation","values":["numberofpages:123"]},{"key":"dc:type","label":"Dc Type","values":["info:eu-repo/semantics/doctoralThesis"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Analog-to-digital converter","Flash ADC","Multi-stage ADCs","Settore ING-INF/01 - Elettronica"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["info:eu-repo/semantics/openAccess","license:Non specificato"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["http://hdl.handle.net/11584/266860"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["The operation of modern electronic devices in different fields as communications, signal processing, and sensor interface is critically affected with robust, high performance and scalable Analog-to-Digital Converter (ADCs), that can be considered as one of the main blocks in many systems, since they are mandatory to make the link between the analog outside world and the evermore-ubiquitous digital computer world. The design of these ADCs come distinct tradeoffs between speed, power, resolution, and die area embodied within many data conversion architectural variations. The flash ADC structure are often the base structure for high-speed operation and simple architecture analog-to-digital converters (ADCs). As the input signal is applied to (2"]},{"key":"dc:title","label":"Title","values":["Redundant analog to digital conversion architectures in CMOS technology"]}]}],"canonical_facts":{"dc:creator":["EL RACHINI, ALI"],"dc:date":["2015-07-27"],"dc:description":["The operation of modern electronic devices in different fields as communications, signal processing, and sensor interface is critically affected with robust, high performance and scalable Analog-to-Digital Converter (ADCs), that can be considered as one of the main blocks in many systems, since they are mandatory to make the link between the analog outside world and the evermore-ubiquitous digital computer world. The design of these ADCs come distinct tradeoffs between speed, power, resolution, and die area embodied within many data conversion architectural variations. The flash ADC structure are often the base structure for high-speed operation and simple architecture analog-to-digital converters (ADCs). As the input signal is applied to (2"],"dc:identifier":["http://hdl.handle.net/11584/266860"],"dc:language":["eng"],"dc:publisher":["Università degli Studi di Cagliari"],"dc:relation":["numberofpages:123"],"dc:rights":["info:eu-repo/semantics/openAccess","license:Non specificato"],"dc:subject":["Analog-to-digital converter","Flash ADC","Multi-stage ADCs","Settore ING-INF/01 - Elettronica"],"dc:title":["Redundant analog to digital conversion architectures in CMOS technology"],"dc:type":["info:eu-repo/semantics/doctoralThesis"]},"updated_at":"2026-07-24T01:30:09Z"}