Analysis and Design of Low-Jitter Oscillators

This thesis presents an examination of the jitter performance of different oscillator types in the presence of flicker noise, white noise and power supply noise. Key results are achieved using time domain simulations to determine cycle jitter of several different oscillator architectures, semiconductor processes and component features. In the end, a design procedure is developed for creating a low-jitter oscillator in a TSMC .25mm CMOS semiconductor process.

Name thesis:degree_name

MS

Grantor dc:publisher

Brigham Young University - Provo

Author dc:creator

• Fitzpatrick, Justin Jennings

• jitter
• oscillator
• circuit simulation
• Electrical and Computer Engineering

Language dc:language

English

Repository record dc:identifier

https://scholarsarchive.byu.edu/etd/13

OAI identifier oai:identifier

oai:scholarsarchive.byu.edu:etd-1012