{"id":{"repo_id":"brazil-uerj","oai_identifier":"oai:pantheon.ufrj.br:11422/6234"},"canonical_url":"https://search.dev.ndltd.org/etd/brazil-uerj/oai:pantheon.ufrj.br:11422/6234","repository":{"repo_id":"brazil-uerj","name":"Brazil UERJ","base_url":"https://pantheon.ufrj.br/oai/request"},"display":{"title":"Conversor DSB-SSB a capacitores chaveados por transformador de Hilbert em tecnologia CMOS de 180 nm","abstract":"The realization of an analog integrated circuit for conversion of Double-Sideband (DSB) amplitude-modulated signals into Single-Sideband (SSB) is presented. Implemented by discrete-time switched-capacitor circuits, it adopts an Infinite Impulse Response (IIR) filter to realize a Hilbert transformer as alternative to digital implementations which take advantage of high processing capacity from parallel digital circuits to obtain the Hilbert transformer by means of high-order Finite Impulse Response (FIR) filters. Fabricated in a 180 nm CMOS technology with metal-metal (MiM) capacitors, the use of structurally all-pass filters greatly reduces the converter’s sensitivity to capacitor mismatch. For 1.8 V power supply and 1 V differential input/output signals, experimental results show the converter achieves Image Rejection Ratio (IRR) greater than 39.5 dB for Lower-Sideband (LSB) modulation and 38.0 dB for Upper-Sideband (USB) modulation for input signals ranging from 25% to 75% of the carrier frequency. These figures are higher than previous analog circuit proposals and comparable to digital implementations of state-of-the-art integrated circuits. Its silicon area is 1.09 mm2 and the converter consumes only 17.7 mW for 1 MHz sampling frequency while its IRR presents standard deviation of only 0.5 dB among 20 chip samples.","abstract_html":"The realization of an analog integrated circuit for conversion of Double-Sideband (DSB) amplitude-modulated signals into Single-Sideband (SSB) is presented. Implemented by discrete-time switched-capacitor circuits, it adopts an Infinite Impulse Response (IIR) filter to realize a Hilbert transformer as alternative to digital implementations which take advantage of high processing capacity from parallel digital circuits to obtain the Hilbert transformer by means of high-order Finite Impulse Response (FIR) filters. Fabricated in a 180 nm CMOS technology with metal-metal (MiM) capacitors, the use of structurally all-pass filters greatly reduces the converter’s sensitivity to capacitor mismatch. For 1.8 V power supply and 1 V differential input/output signals, experimental results show the converter achieves Image Rejection Ratio (IRR) greater than 39.5 dB for Lower-Sideband (LSB) modulation and 38.0 dB for Upper-Sideband (USB) modulation for input signals ranging from 25% to 75% of the carrier frequency. These figures are higher than previous analog circuit proposals and comparable to digital implementations of state-of-the-art integrated circuits. Its silicon area is 1.09 mm2 and the converter consumes only 17.7 mW for 1 MHz sampling frequency while its IRR presents standard deviation of only 0.5 dB among 20 chip samples.","abstract_has_math":false,"creators":["Lacerda, Fábio de"],"institution":"Universidade Federal do Rio de Janeiro","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":[],"advisors":["Petraglia, Antonio"],"committee_chairs":[],"committee_members":[],"year":2017,"date_issued":"2017-03","date_published":"2017-03","updated_at":"2026-07-24T01:16:18Z","subjects":["Circuitos integrados MOS","Transformadores e Reatores","Circuito com capacitores chaveados"],"languages":["por"],"rights":["Acesso Aberto"],"rights_urls":[],"identifier_entries":[]},"links":{"outbound_url":"http://hdl.handle.net/11422/6234","outbound_label":"Handle","outbound_source":"dc:identifier.uri"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor.advisor","label":"Advisor","values":["Petraglia, Antonio"]},{"key":"dc:creator","label":"Author","values":["Lacerda, Fábio de"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:date.accessioned","label":"Dc Date Accessioned","values":["2019-01-25T14:55:16Z"]},{"key":"dc:date.available","label":"Dc Date Available","values":["2026-05-16T03:04:19Z"]},{"key":"dc:date.issued","label":"Date","values":["2017-03"]},{"key":"dc:publisher","label":"Institution","values":["Universidade Federal do Rio de Janeiro"]},{"key":"dc:publisher.department","label":"Dc Publisher Department","values":["Instituto Alberto Luiz Coimbra de Pós-Graduação e Pesquisa de Engenharia"]},{"key":"dc:type","label":"Dc Type","values":["Tese"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["Circuitos integrados MOS","Transformadores e Reatores","Circuito com capacitores chaveados"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["por"]},{"key":"dc:rights","label":"Dc Rights","values":["Acesso Aberto"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier.uri","label":"Identifier URI","values":["http://hdl.handle.net/11422/6234"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description.abstract","label":"Abstract","values":["The realization of an analog integrated circuit for conversion of Double-Sideband (DSB) amplitude-modulated signals into Single-Sideband (SSB) is presented. Implemented by discrete-time switched-capacitor circuits, it adopts an Infinite Impulse Response (IIR) filter to realize a Hilbert transformer as alternative to digital implementations which take advantage of high processing capacity from parallel digital circuits to obtain the Hilbert transformer by means of high-order Finite Impulse Response (FIR) filters. Fabricated in a 180 nm CMOS technology with metal-metal (MiM) capacitors, the use of structurally all-pass filters greatly reduces the converter’s sensitivity to capacitor mismatch. For 1.8 V power supply and 1 V differential input/output signals, experimental results show the converter achieves Image Rejection Ratio (IRR) greater than 39.5 dB for Lower-Sideband (LSB) modulation and 38.0 dB for Upper-Sideband (USB) modulation for input signals ranging from 25% to 75% of the carrier frequency. These figures are higher than previous analog circuit proposals and comparable to digital implementations of state-of-the-art integrated circuits. Its silicon area is 1.09 mm2 and the converter consumes only 17.7 mW for 1 MHz sampling frequency while its IRR presents standard deviation of only 0.5 dB among 20 chip samples."]},{"key":"dc:title","label":"Title","values":["Conversor DSB-SSB a capacitores chaveados por transformador de Hilbert em tecnologia CMOS de 180 nm"]}]}],"canonical_facts":{"dc:contributor.advisor":["Petraglia, Antonio"],"dc:creator":["Lacerda, Fábio de"],"dc:date.accessioned":["2019-01-25T14:55:16Z"],"dc:date.available":["2026-05-16T03:04:19Z"],"dc:date.issued":["2017-03"],"dc:description.abstract":["The realization of an analog integrated circuit for conversion of Double-Sideband (DSB) amplitude-modulated signals into Single-Sideband (SSB) is presented. Implemented by discrete-time switched-capacitor circuits, it adopts an Infinite Impulse Response (IIR) filter to realize a Hilbert transformer as alternative to digital implementations which take advantage of high processing capacity from parallel digital circuits to obtain the Hilbert transformer by means of high-order Finite Impulse Response (FIR) filters. Fabricated in a 180 nm CMOS technology with metal-metal (MiM) capacitors, the use of structurally all-pass filters greatly reduces the converter’s sensitivity to capacitor mismatch. For 1.8 V power supply and 1 V differential input/output signals, experimental results show the converter achieves Image Rejection Ratio (IRR) greater than 39.5 dB for Lower-Sideband (LSB) modulation and 38.0 dB for Upper-Sideband (USB) modulation for input signals ranging from 25% to 75% of the carrier frequency. These figures are higher than previous analog circuit proposals and comparable to digital implementations of state-of-the-art integrated circuits. Its silicon area is 1.09 mm2 and the converter consumes only 17.7 mW for 1 MHz sampling frequency while its IRR presents standard deviation of only 0.5 dB among 20 chip samples."],"dc:identifier.uri":["http://hdl.handle.net/11422/6234"],"dc:language":["por"],"dc:publisher":["Universidade Federal do Rio de Janeiro"],"dc:publisher.department":["Instituto Alberto Luiz Coimbra de Pós-Graduação e Pesquisa de Engenharia"],"dc:rights":["Acesso Aberto"],"dc:subject":["Circuitos integrados MOS","Transformadores e Reatores","Circuito com capacitores chaveados"],"dc:title":["Conversor DSB-SSB a capacitores chaveados por transformador de Hilbert em tecnologia CMOS de 180 nm"],"dc:type":["Tese"]},"updated_at":"2026-07-24T01:16:18Z"}