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Universidade Federal do Rio de Janeiro

Simulação e realização de um computador com base num processador monolítico

Abstract

dc:description.abstract

Describes an architecture for a small computer using a microprocessor as its central processing unit. In the first part of the work it is established the necessary external logic circuits for the microprocessor. The second part presents a simulator that executes instructions given in binary form. The user may define the memory, peripherals and interrupt system organization inside the simulator. Finally it is described the implementation of the computer.

Degree

thesis:*
Grantor dc:publisher
Universidade Federal do Rio de Janeiro
Year dc:date.issued
1973

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Cesar, Christian Lenz
Advisor dc:contributor.advisor
  • Lavelle, Pierre Jean

Subjects

dc:subject × 3

Rights

dc:rights
Statement dc:rights
  • Acesso Aberto
Language dc:language
por

Identifiers

dc:identifier.*
Handle dc:identifier.uri
http://hdl.handle.net/11422/3785
OAI identifier oai:identifier
oai:pantheon.ufrj.br:11422/3785

Chain of custody

source
Harvested from
Brazil UERJ
Base URL
pantheon.ufrj.br/oai/request
Last updated
2026-07-24
Source record
OAI-PMH GetRecord
citation

Cesar, Christian Lenz. Simulação e realização de um computador com base num processador monolítico. Universidade Federal do Rio de Janeiro, 1973. http://hdl.handle.net/11422/3785