Neural Network Reduction for Efficient Execution on Edge Devices

As the size of neural networks increase, the resources needed to support their execution also increase. This presents a barrier for creating neural networks that can be trained and executed within resource limited embedded systems. To reduce the resources needed to execute neural networks, weight reduction is often the first target. A network that has been significantly pruned can be executed on-chip, that is, in low SWaP hardware. But, this does not enable either training or pruning in embedded hardware which first requires a full-sized network to fit within the restricted resources. We introduce two methods of network reduction that allows neural networks to be grown and trained within edge devices, Artificial Neurogenesis and Synaptic Input Consolidation.

Name thesis:degree_name

Ph.D.

Level thesis:degree_level

doctoral

Discipline thesis:degree_discipline

Graduate College

Grantor dc:publisher

The University of Arizona.

Year dc:date.issued

2023

Author dc:creator

• Mixter, John Edward

Advisor dc:contributor.advisor

• Akoglu, Ali

Committee members dc:contributor.committeemember

• Hariri, Salim
• Tandon, Ravi

• Machine Learning
• Neural Network Growth
• Neural Network Reduction
• Neural Networks

Statement dc:rights

• Copyright © is held by the author. Digital access to this material is made possible by the University Libraries, University of Arizona. Further transmission, reproduction, presentation (such as public display or performance) of protected items is prohibited except with permission of the author.

Licence dc:rights.uri

• http://rightsstatements.org/vocab/InC/1.0/

Language dc:language.iso

en

Handle dc:identifier.uri

http://hdl.handle.net/10150/670868

OAI identifier oai:identifier

oai:repository.arizona.edu:10150/670868