A VLSI array processor architecture for emulating resistive network filtering

This thesis deals with silicon implementations of an all-transistor analogue parallel processor that emulates the functionality of a resistive network. The problems related to VLSI -implementations of parallel processors are the main concern of this thesis. These problems are first discussed and then to overcome these problems, a new system design is introduced, namely Reduced Cell-row System (RCS). The work started from a resistive network -type spatial filter that was part of a video image compression algorithm. The functionality of this algorithm, as well as the filter, was described in Cellular Neural/Nonlinear Network (CNN) notations and they will be used throughout this thesis in describing the filters and processing operations. In addition to the resistive network array processor, a gradient calculation block was included on the chips to fulfil the original algorithm requirements. Two different array processors were manufactured and measured. The processors had different objectives for their implementation: in the first implementation, the objective was to test the developed Reduced Cell-row System, while in the second implementation the goal was to obtain information on the large-scale implementation of such an array. During the research, a method to include some level of programmability in this type of filters was also developed. For the possible future implementation of such a system, system-level simulations were performed to locate the critical parts that have the most effect on the accuracy of the network.

Department dc:contributor.department

Department of Electrical and Communications Engineering

Grantor dc:publisher

Helsinki University of Technology

Year dc:date.issued

2007

Author dc:creator

• Kananen, Asko

Contributors dc:contributor

• Aalto-yliopisto
• Aalto University

Language dc:language.iso

en

Repository record dc:identifier.uri

https://aaltodoc.aalto.fi/handle/123456789/2838

OAI identifier oai:identifier

oai:aaltodoc.aalto.fi:123456789/2838