{"id":{"repo_id":"aachen","oai_identifier":"oai:publications.rwth-aachen.de:61565"},"canonical_url":"https://search.dev.ndltd.org/etd/aachen/oai:publications.rwth-aachen.de:61565","repository":{"repo_id":"aachen","name":"RWTH Aachen University","base_url":"https://publications.rwth-aachen.de/oai2d"},"display":{"title":"Modelling and fabrication of high performance Schottky-barrier SOI-MOSFETs with low effective Schottky barriers","abstract":"As continued MOSFETs scaling becomes increasingly challenging, solutions are urgently needed to meet the requirements of the ITRS roadmap. Schottky barrier-MOSFETs are promising alternative devices to current conventional MOSFET because the metallic source/drain contacts has many inherent advantages. However, generally Schottky barrier-MOSFET devices exhibit an inferior performance due to the high Schottky barrier at the source/drain contacts. In order to overcome this problem, lowering of the effective Schottky barrier of nickel silicide was investigated by dopant segregation at the silicide/Si interface, by the use of ultra-thin gate oxide and ultra-thin body SOI. Modelling of single-gated, fully depleted ballistic SOI Schottky barrier-MOSFET were performed with a self-consistent solution of the one-dimensional modified Poisson and Schroedinger equations. An essential difference between Schottky barrier and conventional MOSFET is that tunneling currents through the Schottky barriers play a crucial role. The simulation results show that the Schottky barrier width is strongly influenced by geometrical parameters, i.e., the thinner the gate oxide and the Si channel, the lower the effective Schottky barrier height. Devices with a few nanometers spatially extended highly doped layer directly at the simulated silicide/Si channel interface has a further improved inverse subthreshold slope close to the thermal limit 60mV/dec. In addition, the on-currents were significantly increased. The reason for the dramatic improvement is that the conduction/valence bands are strongly bent due to the highly doped layer and hence the Schottky barriers for electrons becomes highly transparent resulting in an improved on- as well as off-currents. Before transforming this concept on the device, we investigated the fabrication of nickel silicide on ultra-thin SOI (~10nm) and the effect of silicidation induced dopant segregation on diode characteristics. Experimental results show that fully silicided nickel silicide on SOI has a low specific resistivity of 16-20 microohmcm­. In addition, we observed that a high concentration of As/B segregated at the interface of nickel silicide and Si which lowers the effective Schottky barrier height. Next, we experimentally confirmed the importance of ultra-thin gate oxide and ultra-thin Si channel to realize good switching behavior on Schottky-barrier MOSFET. Finally, we used dopant segregation in combination with a thin gate oxide and thin SOI film to realize high performance Schottky barrier-MOSFETs. Both, n and p-type Schottky barrier-MOSFETs with ideal inverse subthreshold slope and increased on current have been successfully realized by using dopant segregation. Temperature dependent measurements showed an effective Schottky barrier height as low as ~0.1eV for electrons. For n-type Schottky barrier MOSFETs with a gate length of L=1 micrometer, a gate oxide thickness of 3.7nm and a Si channel thickness 25nm, nearly ideal inverse subthreshold slope of ~70mV/dec and a Ion/Ioff ratio of 10e7 were achieved. The on-current amounts to 180mA/mm and the transconductance 135mS/mm with a 1.4V gate overdrive and 2V Vds. These results show that our devices have drive and leakage currents comparable to the state-of-the-art. A large tunneling current for holes with increasing Vds in the n-type SB-MOSFET device indicates that dopants at the silicide/Si channel interface are restricted to a few nanometers, in agreement with the simulated results. Such abrupt junction should enable down-scaling to the decananometer gate length. The new technology of dopant segregation for efficient lowering of the silicide/Si Schottky barrier of source and drain can now be applied to high mobility channel materials e.g, strained Si and high-k dielectrics to achieve a further boost of device performance.","abstract_html":"As continued MOSFETs scaling becomes increasingly challenging, solutions are urgently needed to meet the requirements of the ITRS roadmap. Schottky barrier-MOSFETs are promising alternative devices to current conventional MOSFET because the metallic source/drain contacts has many inherent advantages. However, generally Schottky barrier-MOSFET devices exhibit an inferior performance due to the high Schottky barrier at the source/drain contacts. In order to overcome this problem, lowering of the effective Schottky barrier of nickel silicide was investigated by dopant segregation at the silicide/Si interface, by the use of ultra-thin gate oxide and ultra-thin body SOI. Modelling of single-gated, fully depleted ballistic SOI Schottky barrier-MOSFET were performed with a self-consistent solution of the one-dimensional modified Poisson and Schroedinger equations. An essential difference between Schottky barrier and conventional MOSFET is that tunneling currents through the Schottky barriers play a crucial role. The simulation results show that the Schottky barrier width is strongly influenced by geometrical parameters, i.e., the thinner the gate oxide and the Si channel, the lower the effective Schottky barrier height. Devices with a few nanometers spatially extended highly doped layer directly at the simulated silicide/Si channel interface has a further improved inverse subthreshold slope close to the thermal limit 60mV/dec. In addition, the on-currents were significantly increased. The reason for the dramatic improvement is that the conduction/valence bands are strongly bent due to the highly doped layer and hence the Schottky barriers for electrons becomes highly transparent resulting in an improved on- as well as off-currents. Before transforming this concept on the device, we investigated the fabrication of nickel silicide on ultra-thin SOI (~10nm) and the effect of silicidation induced dopant segregation on diode characteristics. Experimental results show that fully silicided nickel silicide on SOI has a low specific resistivity of 16-20 microohmcm­. In addition, we observed that a high concentration of As/B segregated at the interface of nickel silicide and Si which lowers the effective Schottky barrier height. Next, we experimentally confirmed the importance of ultra-thin gate oxide and ultra-thin Si channel to realize good switching behavior on Schottky-barrier MOSFET. Finally, we used dopant segregation in combination with a thin gate oxide and thin SOI film to realize high performance Schottky barrier-MOSFETs. Both, n and p-type Schottky barrier-MOSFETs with ideal inverse subthreshold slope and increased on current have been successfully realized by using dopant segregation. Temperature dependent measurements showed an effective Schottky barrier height as low as ~0.1eV for electrons. For n-type Schottky barrier MOSFETs with a gate length of L=1 micrometer, a gate oxide thickness of 3.7nm and a Si channel thickness 25nm, nearly ideal inverse subthreshold slope of ~70mV/dec and a Ion/Ioff ratio of 10e7 were achieved. The on-current amounts to 180mA/mm and the transconductance 135mS/mm with a 1.4V gate overdrive and 2V Vds. These results show that our devices have drive and leakage currents comparable to the state-of-the-art. A large tunneling current for holes with increasing Vds in the n-type SB-MOSFET device indicates that dopants at the silicide/Si channel interface are restricted to a few nanometers, in agreement with the simulated results. Such abrupt junction should enable down-scaling to the decananometer gate length. The new technology of dopant segregation for efficient lowering of the silicide/Si Schottky barrier of source and drain can now be applied to high mobility channel materials e.g, strained Si and high-k dielectrics to achieve a further boost of device performance.","abstract_has_math":false,"creators":["Zhang, Min"],"institution":"Publikationsserver der RWTH Aachen University","degree_name":null,"degree_level":null,"degree_discipline":null,"degree_department":null,"school":null,"contributors":["Lüth, Hans"],"advisors":[],"committee_chairs":[],"committee_members":[],"year":2006,"date_issued":"2006","date_published":"2006","updated_at":"2026-07-30T19:43:10Z","subjects":["info:eu-repo/classification/ddc/620","Ingenieurwissenschaften","Schottky-Barrieren","MOSFET","ultrathin SOI","Segregation von Dotierstoffen","schottky-barrier","dopant segregation"],"languages":["eng"],"rights":["info:eu-repo/semantics/openAccess"],"rights_urls":[],"identifier_entries":[{"key":"dc:identifier","label":"Identifier","values":["https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-123219%22"],"render_values":[{"text":"https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-123219%22","href":"https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-123219%22","code":true}]}]},"links":{"outbound_url":"https://publications.rwth-aachen.de/record/61565","outbound_label":"Repository record","outbound_source":"dc:identifier"},"metadata_groups":[{"id":"people","label":"People","entries":[{"key":"dc:contributor","label":"Contributor","values":["Lüth, Hans"]},{"key":"dc:creator","label":"Author","values":["Zhang, Min"]}]},{"id":"academic_context","label":"Academic Context","entries":[{"key":"dc:coverage","label":"Dc Coverage","values":["DE"]},{"key":"dc:date","label":"Dc Date","values":["2006"]},{"key":"dc:publisher","label":"Institution","values":["Publikationsserver der RWTH Aachen University"]},{"key":"dc:relation","label":"Dc Relation","values":["info:eu-repo/semantics/altIdentifier/urn/urn:nbn:de:hbz:82-opus-17319"]},{"key":"dc:type","label":"Dc Type","values":["info:eu-repo/semantics/doctoralThesis","info:eu-repo/semantics/publishedVersion"]}]},{"id":"subjects_keywords","label":"Subjects and Keywords","entries":[{"key":"dc:subject","label":"Dc Subject","values":["info:eu-repo/classification/ddc/620","Ingenieurwissenschaften","Schottky-Barrieren","MOSFET","ultrathin SOI","Segregation von Dotierstoffen","schottky-barrier","dopant segregation"]}]},{"id":"language_rights","label":"Language and Rights","entries":[{"key":"dc:language","label":"Dc Language","values":["eng"]},{"key":"dc:rights","label":"Dc Rights","values":["info:eu-repo/semantics/openAccess"]}]},{"id":"identifiers","label":"Identifiers","entries":[{"key":"dc:identifier","label":"Identifier","values":["https://publications.rwth-aachen.de/record/61565","https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-123219%22"]}]},{"id":"additional","label":"Additional Metadata","entries":[{"key":"dc:description","label":"Description","values":["As continued MOSFETs scaling becomes increasingly challenging, solutions are urgently needed to meet the requirements of the ITRS roadmap. Schottky barrier-MOSFETs are promising alternative devices to current conventional MOSFET because the metallic source/drain contacts has many inherent advantages. However, generally Schottky barrier-MOSFET devices exhibit an inferior performance due to the high Schottky barrier at the source/drain contacts. In order to overcome this problem, lowering of the effective Schottky barrier of nickel silicide was investigated by dopant segregation at the silicide/Si interface, by the use of ultra-thin gate oxide and ultra-thin body SOI. Modelling of single-gated, fully depleted ballistic SOI Schottky barrier-MOSFET were performed with a self-consistent solution of the one-dimensional modified Poisson and Schroedinger equations. An essential difference between Schottky barrier and conventional MOSFET is that tunneling currents through the Schottky barriers play a crucial role. The simulation results show that the Schottky barrier width is strongly influenced by geometrical parameters, i.e., the thinner the gate oxide and the Si channel, the lower the effective Schottky barrier height. Devices with a few nanometers spatially extended highly doped layer directly at the simulated silicide/Si channel interface has a further improved inverse subthreshold slope close to the thermal limit 60mV/dec. In addition, the on-currents were significantly increased. The reason for the dramatic improvement is that the conduction/valence bands are strongly bent due to the highly doped layer and hence the Schottky barriers for electrons becomes highly transparent resulting in an improved on- as well as off-currents. Before transforming this concept on the device, we investigated the fabrication of nickel silicide on ultra-thin SOI (~10nm) and the effect of silicidation induced dopant segregation on diode characteristics. Experimental results show that fully silicided nickel silicide on SOI has a low specific resistivity of 16-20 microohmcm­. In addition, we observed that a high concentration of As/B segregated at the interface of nickel silicide and Si which lowers the effective Schottky barrier height. Next, we experimentally confirmed the importance of ultra-thin gate oxide and ultra-thin Si channel to realize good switching behavior on Schottky-barrier MOSFET. Finally, we used dopant segregation in combination with a thin gate oxide and thin SOI film to realize high performance Schottky barrier-MOSFETs. Both, n and p-type Schottky barrier-MOSFETs with ideal inverse subthreshold slope and increased on current have been successfully realized by using dopant segregation. Temperature dependent measurements showed an effective Schottky barrier height as low as ~0.1eV for electrons. For n-type Schottky barrier MOSFETs with a gate length of L=1 micrometer, a gate oxide thickness of 3.7nm and a Si channel thickness 25nm, nearly ideal inverse subthreshold slope of ~70mV/dec and a Ion/Ioff ratio of 10e7 were achieved. The on-current amounts to 180mA/mm and the transconductance 135mS/mm with a 1.4V gate overdrive and 2V Vds. These results show that our devices have drive and leakage currents comparable to the state-of-the-art. A large tunneling current for holes with increasing Vds in the n-type SB-MOSFET device indicates that dopants at the silicide/Si channel interface are restricted to a few nanometers, in agreement with the simulated results. Such abrupt junction should enable down-scaling to the decananometer gate length. The new technology of dopant segregation for efficient lowering of the silicide/Si Schottky barrier of source and drain can now be applied to high mobility channel materials e.g, strained Si and high-k dielectrics to achieve a further boost of device performance."]},{"key":"dc:source","label":"Dc Source","values":["Aachen : Publikationsserver der RWTH Aachen University 98 S. : Ill., graph. Darst. (2006). = Aachen, Techn. Hochsch., Diss., 2006"]},{"key":"dc:title","label":"Title","values":["Modelling and fabrication of high performance Schottky-barrier SOI-MOSFETs with low effective Schottky barriers"]}]}],"canonical_facts":{"dc:contributor":["Lüth, Hans"],"dc:coverage":["DE"],"dc:creator":["Zhang, Min"],"dc:date":["2006"],"dc:description":["As continued MOSFETs scaling becomes increasingly challenging, solutions are urgently needed to meet the requirements of the ITRS roadmap. Schottky barrier-MOSFETs are promising alternative devices to current conventional MOSFET because the metallic source/drain contacts has many inherent advantages. However, generally Schottky barrier-MOSFET devices exhibit an inferior performance due to the high Schottky barrier at the source/drain contacts. In order to overcome this problem, lowering of the effective Schottky barrier of nickel silicide was investigated by dopant segregation at the silicide/Si interface, by the use of ultra-thin gate oxide and ultra-thin body SOI. Modelling of single-gated, fully depleted ballistic SOI Schottky barrier-MOSFET were performed with a self-consistent solution of the one-dimensional modified Poisson and Schroedinger equations. An essential difference between Schottky barrier and conventional MOSFET is that tunneling currents through the Schottky barriers play a crucial role. The simulation results show that the Schottky barrier width is strongly influenced by geometrical parameters, i.e., the thinner the gate oxide and the Si channel, the lower the effective Schottky barrier height. Devices with a few nanometers spatially extended highly doped layer directly at the simulated silicide/Si channel interface has a further improved inverse subthreshold slope close to the thermal limit 60mV/dec. In addition, the on-currents were significantly increased. The reason for the dramatic improvement is that the conduction/valence bands are strongly bent due to the highly doped layer and hence the Schottky barriers for electrons becomes highly transparent resulting in an improved on- as well as off-currents. Before transforming this concept on the device, we investigated the fabrication of nickel silicide on ultra-thin SOI (~10nm) and the effect of silicidation induced dopant segregation on diode characteristics. Experimental results show that fully silicided nickel silicide on SOI has a low specific resistivity of 16-20 microohmcm­. In addition, we observed that a high concentration of As/B segregated at the interface of nickel silicide and Si which lowers the effective Schottky barrier height. Next, we experimentally confirmed the importance of ultra-thin gate oxide and ultra-thin Si channel to realize good switching behavior on Schottky-barrier MOSFET. Finally, we used dopant segregation in combination with a thin gate oxide and thin SOI film to realize high performance Schottky barrier-MOSFETs. Both, n and p-type Schottky barrier-MOSFETs with ideal inverse subthreshold slope and increased on current have been successfully realized by using dopant segregation. Temperature dependent measurements showed an effective Schottky barrier height as low as ~0.1eV for electrons. For n-type Schottky barrier MOSFETs with a gate length of L=1 micrometer, a gate oxide thickness of 3.7nm and a Si channel thickness 25nm, nearly ideal inverse subthreshold slope of ~70mV/dec and a Ion/Ioff ratio of 10e7 were achieved. The on-current amounts to 180mA/mm and the transconductance 135mS/mm with a 1.4V gate overdrive and 2V Vds. These results show that our devices have drive and leakage currents comparable to the state-of-the-art. A large tunneling current for holes with increasing Vds in the n-type SB-MOSFET device indicates that dopants at the silicide/Si channel interface are restricted to a few nanometers, in agreement with the simulated results. Such abrupt junction should enable down-scaling to the decananometer gate length. The new technology of dopant segregation for efficient lowering of the silicide/Si Schottky barrier of source and drain can now be applied to high mobility channel materials e.g, strained Si and high-k dielectrics to achieve a further boost of device performance."],"dc:identifier":["https://publications.rwth-aachen.de/record/61565","https://publications.rwth-aachen.de/search?p=id:%22RWTH-CONV-123219%22"],"dc:language":["eng"],"dc:publisher":["Publikationsserver der RWTH Aachen University"],"dc:relation":["info:eu-repo/semantics/altIdentifier/urn/urn:nbn:de:hbz:82-opus-17319"],"dc:rights":["info:eu-repo/semantics/openAccess"],"dc:source":["Aachen : Publikationsserver der RWTH Aachen University 98 S. : Ill., graph. Darst. (2006). = Aachen, Techn. Hochsch., Diss., 2006"],"dc:subject":["info:eu-repo/classification/ddc/620","Ingenieurwissenschaften","Schottky-Barrieren","MOSFET","ultrathin SOI","Segregation von Dotierstoffen","schottky-barrier","dopant segregation"],"dc:title":["Modelling and fabrication of high performance Schottky-barrier SOI-MOSFETs with low effective Schottky barriers"],"dc:type":["info:eu-repo/semantics/doctoralThesis","info:eu-repo/semantics/publishedVersion"]},"updated_at":"2026-07-30T19:43:10Z"}