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Publikationsserver der RWTH Aachen University

A versatile DSP, FPGA structure optimized for rapid prototyping and digital real-time simulation of power electronic and electrical drive systems

Abstract

dc:description

A Versatile DSP/ FPGA Structure optimized for Rapid Prototyping and Digital Real-Time Simulation of Power Electronic and Electrical Drive Systems This thesis is devoted to the development of a powerful digital computer equipped with flexible interfaces. It is designed to suit Rapid Prototyping and digital real-time simulation methods of power electronic and electrical drive (PE&ED) systems. This universal hardware basis unites the possibilities (benefit) to implement control equipment and complex but nevertheless low cost digital real-time simulators of PE&ED systems on the basis of a single basic hardware element. This aim is achieved by the synthesis of a new hardware structure based on the analysis of hardware requirements and a literature study yielding the proven elements. The new hardware structure is characterized by the use of powerful digital signalprocessors (DSPs) offering very high floating-point computing power and separate control interfaces based on flexible field-programmable gate arrays (FPGAs). This structure has been expanded to an over a large range scalable multiprocessor system taking into account the communication structure required by real-time simulators of PE&ED applications. A single board basic element is proposed as basis of a powerful and flexible, modular hardware structure. This element has been implemented in the form of the "ISEADSP board". In addition, several FPGA based control interface designs are presented. Reference applications demonstrate the viability of the "ISEADSP board" implementation.

Degree

thesis:*
Grantor dc:publisher
Publikationsserver der RWTH Aachen University
Year dc:date
2001

Author and committee

dc:creator, dc:contributor.*
Author dc:creator
  • Karipidis, Claus-Ulrich
Contributors dc:contributor
  • de Doncker, Rik W.

Subjects

dc:subject × 8

Rights

dc:rights
Statement dc:rights
  • info:eu-repo/semantics/openAccess
Language dc:language
eng

Identifiers

dc:identifier.*

Chain of custody

source
Harvested from
RWTH Aachen University
Base URL
publications.rwth-aachen.de/oai2d
Last updated
2026-07-30
Source record
OAI-PMH GetRecord
citation

Karipidis, Claus-Ulrich. A versatile DSP, FPGA structure optimized for rapid prototyping and digital real-time simulation of power electronic and electrical drive systems. Publikationsserver der RWTH Aachen University, 2001. https://publications.rwth-aachen.de/record/56795