Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 18 of 18 for “"x86-64"”.
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Explicit-State Model Checking of Concurrent x86-64 Assembly
… novel tool-set for model checking of concurrent x86-64 assembly programs, via Partial Order Reduction (POR). xavier{} presents a realistic platform for systematically exploring and analyzing the state-space of concurrent x86 assembly programs, with the aim of detecting bugs via assertion failures …
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Dynamic binary translation from x86-32 code to x86-64 code for virtualization
… of the virtual machine monitor by running 32-bit x86 operating systems in x86-64 mode. In order to do so, 32-bit operating system binary code is translated into x86-64 binary code via "widening binary translation"; x86-32 code is "widened" into x86-64 code. The main challenge of widening BT is …
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Toward Bridging the Semantic Gap Between x86-64 Software Binaries and Abstract Languages for Formal Verification and Security
… systems where source code is unavailable. The x86-64 Instruction Set Architecture (ISA) was chosen due to its applicability to a wide range of relevant deployed software. As a necessary dependency for the formal verification of software binaries, a machine model of the ISA is required. The …
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Scalable validation of binary lifters
… of the languages involved (e.g., Intel’s x86-64 and LLVM IR). Towards that goal, I made two broad contributions. First, I defined the most complete and thoroughly tested formal semantics of x86-64 to date. The semantics faithfully formalizes all the non-deprecated, sequential user-level …
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CRIU-RTX: Remote Thread eXecution using Checkpoint/Restore in Userspace
… gains while scaling-out applications across x86-64 servers, and energy efficiency gains of up to 18% while scaling-out across a cluster of x86-64 server and ARM64 embedded boards. Since CRIU-RTX does not depend on operating system modifications, it can be easily deployed on a diverse set of …
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Cache coherent commutative operations
… data operations, which are implemented as x86-64 ISA extensions. To evaluate single-word instructions, this thesis presents a case study of a new reference counting scheme, and for multi-word commutative operations, this thesis describes the design of a commutative memory allocator. Coup …
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Comparative Performance Analysis of Cryptographic Workloads Across Cloud Providers: A Multi-Language Study on FaaS and IaaS Platforms Dataset
… spans multiple configurations, including x86 64 and Arm64 architectures, various programming languages (Rust, Go, Python, Java, C#, and TypeScript), and function memory allocations. The findings highlight performance trade-offs between FaaS and IaaS compute paradigms for cryptographic …
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Enhancing Software Security through Code Diversification Verification, Control-flow Restriction, and Automatic Compartmentalization
… known as Software Fault Isolation (SFI) on an x86-64 architecture. Prior works attempting to implement SFI on an x86-64 architecture have suffered from supporting a limited number of sandboxes, high context-switch overhead, and requiring extensive modifications to the toolchain, jeopardizing …
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ZxOS: Zephyr-based Guest Operating System for Heterogeneous ISA Machines
… incorporate CPUs of the RISC ISA family (e.g, ARM64, RISC-V), which when integrated with a highperformance server with CPUs of the CISC ISA family (e.g., x86-64) yields a single machine with heterogeneous-ISA CPUs. This thesis presents the design of a shared memory OS for a cache-coherent, shared …
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Popcorn Linux: enabling efficient inter-core communication in a Linux-based multikernel operating system
… multiple instances of the Linux kernel on a 64-bit x86 machine and to support more than 4 kernels running simultaneously. We demonstrate that existing subsystems within Linux can be leveraged to meet the design goals of a multikernel OS. Taking this approach, we developed a fast inter-kernel …
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A Task-based Programming Methodology Using MCA Standards for Multicore Systems
… (RTL). Our evaluation platforms are a multicore x86-64 computing node and an NVIDIA Jetson TK1 board with a CPU and a GPU on the same chip. We evaluate our MTAPI RTL implementation using applications from Rodinia and BOTS. We compare our MTAPI implementation with the Siemens MTAPI and with …
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Leveraging Processor-diversity For Improved Performance In Heterogeneous-ISA Systems
… system using an Intel Xeon Gold 5118 x86-64 server and a Cavium ThunderX ARMv8 server and evaluates the effectiveness of our infrastructure and scheduling policy. Our results reveal that heterogeneous-ISA systems that are processor-preference-aware and with cross-ISA execution …
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Secure Programming with Dispersed Compartments
… on commodity hardware by focusing on ARM and x86-64 platforms. SIRIUS includes new security extensions and ab- stractions within the underlying OSs, firmware, and TEE stacks. Moreover, it provides a novel userspace API to reduce application modifications during compartmentalization. Finally, …
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Compilers for portable programming of heterogeneous parallel & approximate computing systems
… GPUs, Intel’s AVX vector units, and to multicore X86-64 processors. Experimental results show that HPVM optimizations achieve significant performance improvements, HPVM translators achieve performance competitive with manually developed OpenCL code for both GPUs and vector hardware, and that …
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Guided Automatic Binary Parallelisation
… of 1.91x on binaries from SPEC CPU2006 on a real x86-64 eight-core system compared to native sequential execution. Performance is obtained for SPEC CPU2006 executables compiled from a variety of source languages and by different compilers.
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Translation validation for compilation verification
… for the input/output languages (LLVM IR and x86-64 based Machine IR), which are separate artifacts and not hardcoded into the logic of the systems. The only components that are transformation-specific are the two verification condition generators. The Instruction Selection one requires …
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Low-Level Static Analysis for Memory Usage and Control Flow Recovery
Formal characterization of the memory used by a program is an important basis for security analyses, compositional verification, and identification of noninterference. However, soundly proving memory usage requires operating on the assembly level due to the semantic gap between high-level languages …
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Popcorn Linux: A Compiler and Runtime for Execution Migration Between Heterogeneous-ISA Architectures
… evaluated on a setup containing and ARM and an x86 processor interconnected via point-to-point interconnect over PCIe. This dissertation shows that sub-millisecond state transformation is achievable. Additionally, it shows that for a datacenter-like workload using benchmarks from the NAS …