Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 20 of 62 for “"x86"”.
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Dynamic binary translation from x86-32 code to x86-64 code for virtualization
… of the virtual machine monitor by running 32-bit x86 operating systems in x86-64 mode. In order to do so, 32-bit operating system binary code is translated into x86-64 binary code via "widening binary translation"; x86-32 code is "widened" into x86-64 code. The main challenge of widening BT is …
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Symbolic Execution Over Native X86
… ELF and WinPE binary programs over the native x86 ISA instruction set, and specifically discusses an approach to describing state mathematically using a formal algebra.
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Software lock elision for x86 machine code
… transactional memory runtime system called SLE_x86 that can potentially break this deadlock by decoupling transactional memory from programs using it. Unlike most other STM designs, the core design principle is transparency rather than performance. SLE_x86 operates at the level of x86 machine …
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A Robust Foundation for Binary Translation of X86 Code
Self-modifying code is one of the major hurdles to binary translation. This dissertation describes a self-modifying code detector to prevent the binary translator from translating self-modifying code. In order to illustrate the usefulness of the binary translation framework, an optimizer that …
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Explicit-State Model Checking of Concurrent x86-64 Assembly
… novel tool-set for model checking of concurrent x86-64 assembly programs, via Partial Order Reduction (POR). xavier{} presents a realistic platform for systematically exploring and analyzing the state-space of concurrent x86 assembly programs, with the aim of detecting bugs via assertion failures …
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An x86 protected mode virtual machine monitor for the MIT exokernel
Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
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Helium : lifting high-performance stencil kernels from stripped x86 binaries to halide DSL code
… stencil kernels from a stripped x86 binary and generate the corresponding code in the high-level domain-specific language Halide. Using Halide's state-of-the-art optimizations targeting current hardware, we show that new optimized versions of these kernels can replace the …
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Toward Bridging the Semantic Gap Between x86-64 Software Binaries and Abstract Languages for Formal Verification and Security
… systems where source code is unavailable. The x86-64 Instruction Set Architecture (ISA) was chosen due to its applicability to a wide range of relevant deployed software. As a necessary dependency for the formal verification of software binaries, a machine model of the ISA is required. The …
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Scalable validation of binary lifters
… of the languages involved (e.g., Intel’s x86-64 and LLVM IR). Towards that goal, I made two broad contributions. First, I defined the most complete and thoroughly tested formal semantics of x86-64 to date. The semantics faithfully formalizes all the non-deprecated, sequential user-level …
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Semantics of low-level languages
… executable models of the languages discussed: x86 and Tezos Michelson. We extend an existing formalization of x86 to include its most common format - executable binaries by implementing an instruction decoder. We start completely from scratch with another: Tezos’ Michelson. We produce …
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SNIC-DSM: SmartNIC based DSM Infrastructure for Heterogeneous-ISA Machines
… architecture (ISA)-heterogeneity: high-end x86 servers with attached SmartNICs and SmartSSDs that incorporate general-purpose CPUs, typically of the RISC ISA family (e.g., ARM, RISC-V). To alleviate resource congestion on server computing nodes, application workloads can be scaled-out across …
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Modeling and Runtime Systems for Coordinated Power-Performance Management
… on performance and energy consumption on Intel x86 systems with accelerators of Intel Xeon Phi and a Nvidia general-purpose graphics processing unit (GPGPU). We show the trade-offs and potentials for improving efficiency. Furthermore, we propose a parallel performance model for coordinating …
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Popcorn Linux: enabling efficient inter-core communication in a Linux-based multikernel operating system
… instances of the Linux kernel on a 64-bit x86 machine and to support more than 4 kernels running simultaneously. We demonstrate that existing subsystems within Linux can be leveraged to meet the design goals of a multikernel OS. Taking this approach, we developed a fast inter-kernel network …
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CRIU-RTX: Remote Thread eXecution using Checkpoint/Restore in Userspace
… gains while scaling-out applications across x86-64 servers, and energy efficiency gains of up to 18% while scaling-out across a cluster of x86-64 server and ARM64 embedded boards. Since CRIU-RTX does not depend on operating system modifications, it can be easily deployed on a diverse set of …
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CUDA Enhanced Filtering In a Pipelined Video Processing Framework
… been a significant computational task for modern x86 processors. With every video frame composed of one to three planes, each consisting of a two-dimensional array of pixel data, and a video clip comprising of thousands of such frames, the sheer volume of data is significant. With the introduction …
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BlueCache : a scalable distributed flash-based key-value store
… a flash-based KVS software running on an x86 server with commodity SSD cannot harness the full potential device performance of flash memory, because of overheads of the legacy storage I/O stack and relatively slow network in comparison with faster flash storage. In this work, we examine an …
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SoftECC : a system for software memory integrity checking
… of SoftECC in the JOS kernel on the x86 architecture show that SoftECC can halve the number of undetectable soft errors using minimal compute time.
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Intel Corporation -- Intel Labs Europe : open innovation 2.0
… designed with a microprocessor based on Intel's x86 architecture. Over the last decade, however, the industry has seen many changes, and current trends send strong signals to Intel that it must continue the evolution of its own internal corporate innovation process-one that has driven Intel's …
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Asbestos : operating system security for mobile devices
… an HP iPAQ hand held computer and the original x86 Asbestos.
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Integer overflow discovery using goal-directed conditional branch enforcement
… DIODE works with off-the-shelf, production x86 binaries. Our results show that, for our benchmark set of applications, for every target memory allocation site, either 1) DIODE is able to generate an input that triggers an overflow at that site or 2) there is no input that would trigger an …
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