Global ETD Search
Search theses and dissertations gathered from participating repositories worldwide. Every result links back to the library that holds it. No account is needed.
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Showing 1 to 4 of 4 for “"waferscale"”.
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Waferscale network switches
Submission original under an indefinite embargo labeled 'Open Access'. The submission was exported from vireo on 2025-10-19 without embargo terms
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Testing infrastructure and other considerations in a waferscale processor
… infrastructure in a chiplet-based ARM-based waferscale system. Some unique challenges and corresponding solutions in such a waferscale system are addressed. Additionally, verification efforts during this project are detailed, including RTL simulations and FPGA prototyping. The thesis …
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Network-on-chip design for a chiplet-based waferscale processor
Motivated by the failing of Moore’s law and Dennard scaling, as well as increasingly large parallel tasks like machine learning and big data analysis, processors continue to increase in area and incorporate more computational cores. This growth requires innovation in manufacturing processes to …
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Architectural exploration of Si-IF many-die processors
Embargo set by: Seth Robbins for item 107443 Lift date: 2020-09-04T20:50:11Z Reason: Author requested closed access (OA after 2yrs) in Vireo ETD system